riscv/rocket-chip
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rocketchip: globals are for sissies

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Wesley W. Terpstra committed 2016-09-15 21:28:56 -07:00
1 parent 644f8fe974
commit fb24e847fd
11 files changed
+74 -66
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src/main/scala/coreplex/Configs.scala
+1 -1
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@@ -146,7 +146,7 @@ class BaseCoreplexConfig extends Config (
else new MESICoherence(site(L2DirectoryRepresentation))),
nManagers = site(NBanksPerMemoryChannel)*site(NMemoryChannels) + 1 /* MMIO */,
nCachingClients = site(NCachedTileLinkPorts),
nCachelessClients = site(NCoreplexExtClients).get + site(NUncachedTileLinkPorts),
nCachelessClients = site(NCoreplexExtClients) + site(NUncachedTileLinkPorts),
maxClientXacts = max_int(
// L1 cache
site(DCacheKey).nMSHRs + 1 /* IOMSHR */,