From f9fb3978caa5eb4a3e4a546a3de8bfd7fb1e7de7 Mon Sep 17 00:00:00 2001 From: Yunsup Lee Date: Sat, 3 Mar 2012 15:07:22 -0800 Subject: [PATCH] fix store prefetch bug, it no longer occupies an entry in the sdq --- rocket/src/main/scala/coherence.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rocket/src/main/scala/coherence.scala b/rocket/src/main/scala/coherence.scala index 0ce1f1c9..005f17c9 100644 --- a/rocket/src/main/scala/coherence.scala +++ b/rocket/src/main/scala/coherence.scala @@ -92,8 +92,8 @@ object cpuCmdToRW { val store = (cmd === M_XWR) val load = (cmd === M_XRD) val amo = cmd(3).toBool - val read = load || amo || (cmd === M_PFR) - val write = store || amo || (cmd === M_PFW) + val read = load || amo || (cmd === M_PFR) || (cmd === M_PFW) + val write = store || amo (read, write) } }