riscv/rocket-chip
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rm race condition on trace_count

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This commit is contained in:
Scott Johnson 2016-08-12 16:58:22 -07:00
parent ceff6dd0c8
commit f945acf712
1 changed files with 7 additions and 11 deletions
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18
vsrc/TestDriver.v
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@ -45,6 +45,13 @@ module TestDriver;
integer stderr = 32'h80000002; integer stderr = 32'h80000002;
always @(posedge clk) always @(posedge clk)
begin begin
trace_count = trace_count + 1;
`ifdef GATE_LEVEL
if (verbose)
begin
$fdisplay(stderr, "C: %10d", trace_count-1);
end
`endif
if (!reset) if (!reset)
begin begin
if (max_cycles > 0 && trace_count > max_cycles) if (max_cycles > 0 && trace_count > max_cycles)
@ -70,17 +77,6 @@ module TestDriver;
end end
end end
always @(posedge clk)
begin
trace_count = trace_count + 1;
`ifdef GATE_LEVEL
if (verbose)
begin
$fdisplay(stderr, "C: %10d", trace_count-1);
end
`endif
end
TestHarness testHarness( TestHarness testHarness(
.clk(clk), .clk(clk),
.reset(reset), .reset(reset),