diff --git a/src/main/scala/uncore/tilelink2/Splitter.scala b/src/main/scala/uncore/tilelink2/Splitter.scala
index 6a0a4503..42f1d095 100644
--- a/src/main/scala/uncore/tilelink2/Splitter.scala
+++ b/src/main/scala/uncore/tilelink2/Splitter.scala
@@ -21,14 +21,14 @@ class TLSplitter(policy: TLArbiter.Policy = TLArbiter.lowestIndexFirst)(implicit
         seq(0).copy(
           minLatency = seq.map(_.minLatency).min,
           endSinkId = outputIdRanges.map(_.map(_.end).getOrElse(0)).max,
-          managers = ManagerUnification(seq.zipWithIndex.flatMap { case (port, i) =>
+          managers = seq.zipWithIndex.flatMap { case (port, i) =>
             require (port.beatBytes == seq(0).beatBytes,
               s"Splitter data widths don't match: ${port.managers.map(_.name)} has ${port.beatBytes}B vs ${seq(0).managers.map(_.name)} has ${seq(0).beatBytes}B")
             val fifoIdMapper = fifoIdFactory()
             port.managers map { manager => manager.copy(
               fifoId = manager.fifoId.map(fifoIdMapper(_))
             )}
-          })
+          }
         )
       }
     })