Use sNaN value for flw, like other single-precision ops
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@ -536,7 +536,7 @@ class FPU(cfg: FPUParams)(implicit p: Parameters) extends FPUModule()(p) {
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case 32 => rec_s
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case 64 =>
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val rec_d = hardfloat.recFNFromFN(dExpWidth, dSigWidth, load_wb_data)
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Mux(load_wb_single, Cat(UInt((BigInt(1) << (fLen - 32)) - 1), rec_s), rec_d)
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Mux(load_wb_single, rec_s | CanonicalNaN.signaling(maxExpWidth, maxSigWidth), rec_d)
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}
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// regfile
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