From f3c726033af913651b152cbb9131fc22fe6e98c6 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Fri, 28 Oct 2016 11:56:05 -0700 Subject: [PATCH] Make all Chisel invocations depend on FIRRTL_JAR --- emulator/Makefrag-verilator | 4 ++-- vsim/Makefrag-verilog | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/emulator/Makefrag-verilator b/emulator/Makefrag-verilator index a45d8503..3f1fc17a 100644 --- a/emulator/Makefrag-verilator +++ b/emulator/Makefrag-verilator @@ -8,11 +8,11 @@ verilog_debug = $(generated_dir_debug)/$(long_name).v .SECONDARY: $(firrtl) $(firrtl_debug) $(verilog) $(verilog_debug) -$(generated_dir)/%.fir $(generated_dir)/%.prm $(generated_dir)/%.d: $(chisel_srcs) $(bootrom_img) +$(generated_dir)/%.fir $(generated_dir)/%.prm $(generated_dir)/%.d: $(FIRRTL_JAR) $(chisel_srcs) $(bootrom_img) mkdir -p $(dir $@) cd $(base_dir) && $(SBT) "run-main $(PROJECT).Generator $(generated_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)" -$(generated_dir_debug)/%.fir $(generated_dir_debug)/%.prm $(generated_dir_debug)/%.d: $(chisel_srcs) $(bootrom_img) +$(generated_dir_debug)/%.fir $(generated_dir_debug)/%.prm $(generated_dir_debug)/%.d: $(FIRRTL_JAR) $(chisel_srcs) $(bootrom_img) mkdir -p $(dir $@) cd $(base_dir) && $(SBT) "run-main $(PROJECT).Generator $(generated_dir_debug) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)" diff --git a/vsim/Makefrag-verilog b/vsim/Makefrag-verilog index 80df7160..953bff80 100644 --- a/vsim/Makefrag-verilog +++ b/vsim/Makefrag-verilog @@ -8,7 +8,7 @@ verilog = $(generated_dir)/$(long_name).v # files. .SECONDARY: $(firrtl) $(verilog) -$(generated_dir)/%.fir $(generated_dir)/%.prm $(generated_dir)/%.d: $(chisel_srcs) $(bootrom_img) +$(generated_dir)/%.fir $(generated_dir)/%.prm $(generated_dir)/%.d: $(FIRRTL_JAR) $(chisel_srcs) $(bootrom_img) mkdir -p $(dir $@) cd $(base_dir) && $(SBT) "run-main $(PROJECT).Generator $(generated_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)"