riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

Miscellaneous periphery improvements (#689)

Browse Source 
* fifofixer: work around zero-width wires for single source id
* periphery: sourceshrinker takes maxInFlight parameter
This commit is contained in:
Henry Cook
2017-04-20 11:28:00 -07:00
committed by Wesley W. Terpstra
parent 9002e7e532
commit ef8a819763
2 changed files with 3 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/main/scala/rocketchip/Periphery.scala
View File

@ -253,7 +253,7 @@ trait PeripheryMasterTLMMIO {
mmio_tl :=
TLBuffer()(
TLSourceShrinker(config.idBits)(
TLSourceShrinker(1 << config.idBits)(
TLWidthWidget(socBusConfig.beatBytes)(
socBus.node)))
}