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+# groundtest
+
+A memory tester circuit for Rocket Chip's memory system. The generator tile
+plugs into the existing SoC generator as what looks like a CPU. However,
+instead of running programs, the tile generates fixed memory requests out to
+the L2. There are both cached and uncached generators. The cached generator
+has an intervening L1 cache, the uncached generator sends TileLink requests
+directly to the L2.
+
+Assertions are set to fail if the wrong data comes back or if a request times
+out waiting for the response.