nasti: include convenient clock crossing helpers
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@ -705,3 +705,33 @@ class NastiMemoryDemux(nRoutes: Int)(implicit p: Parameters) extends NastiModule
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connectRespChannel(i, io.master.b, slave.b)
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}
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}
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object AsyncNastiTo {
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// source(master) is in our clock domain, output is in the 'to' clock domain
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def apply[T <: Data](to_clock: Clock, to_reset: Bool, source: NastiIO, depth: Int = 3, sync: Int = 2)(implicit p: Parameters): NastiIO = {
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val sink = Wire(new NastiIO)
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sink.aw <> AsyncDecoupledTo(to_clock, to_reset, source.aw, depth, sync)
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sink.ar <> AsyncDecoupledTo(to_clock, to_reset, source.ar, depth, sync)
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sink.w <> AsyncDecoupledTo(to_clock, to_reset, source.w, depth, sync)
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source.b <> AsyncDecoupledFrom(to_clock, to_reset, sink.b, depth, sync)
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source.r <> AsyncDecoupledFrom(to_clock, to_reset, sink.r, depth, sync)
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sink
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}
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}
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object AsyncNastiFrom {
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// source(master) is in the 'from' clock domain, output is in our clock domain
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def apply[T <: Data](from_clock: Clock, from_reset: Bool, source: NastiIO, depth: Int = 3, sync: Int = 2)(implicit p: Parameters): NastiIO = {
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val sink = Wire(new NastiIO)
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sink.aw <> AsyncDecoupledFrom(from_clock, from_reset, source.aw, depth, sync)
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sink.ar <> AsyncDecoupledFrom(from_clock, from_reset, source.ar, depth, sync)
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sink.w <> AsyncDecoupledFrom(from_clock, from_reset, source.w, depth, sync)
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source.b <> AsyncDecoupledTo(from_clock, from_reset, sink.b, depth, sync)
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source.r <> AsyncDecoupledTo(from_clock, from_reset, sink.r, depth, sync)
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sink
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}
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}
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