riscv/rocket-chip
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Avoid needless stall on E-channel back pressure

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This commit is contained in:
Andrew Waterman 2017-07-29 11:47:58 -07:00
parent 8e2e931770
commit edcd2c696c
1 changed files with 1 additions and 1 deletions
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src/main/scala/rocket/DCache.scala
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@ -397,7 +397,7 @@ class DCacheModule(outer: DCache) extends HellaCacheModule(outer) {
val blockProbeAfterGrantCount = Reg(init=UInt(0))
when (blockProbeAfterGrantCount > 0) { blockProbeAfterGrantCount := blockProbeAfterGrantCount - 1 }
val canAcceptCachedGrant = if (cacheParams.acquireBeforeRelease) release_state === s_ready else true.B
tl_out.d.ready := Mux(grantIsCached, tl_out.e.ready && canAcceptCachedGrant, true.B)
tl_out.d.ready := Mux(grantIsCached, (!d_first || tl_out.e.ready) && canAcceptCachedGrant, true.B)
when (tl_out.d.fire()) {
when (grantIsCached) {
grantInProgress := true