From ecd1af326c49e8fbf27e32f8da0da1920c66ffcd Mon Sep 17 00:00:00 2001
From: Howard Mao <zhehao.mao@gmail.com>
Date: Tue, 26 Jul 2016 12:43:08 -0700
Subject: [PATCH] fix L2 deadlock bug and add more advanced trace generator

---
 groundtest                       | 2 +-
 src/main/scala/TestConfigs.scala | 7 +++++--
 uncore                           | 2 +-
 3 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/groundtest b/groundtest
index 26f8823e..39c3908b 160000
--- a/groundtest
+++ b/groundtest
@@ -1 +1 @@
-Subproject commit 26f8823eaccadc4ad74ce9d4b73c6b388b53c21a
+Subproject commit 39c3908b2186adcba434c10e783ab638468f7bb3
diff --git a/src/main/scala/TestConfigs.scala b/src/main/scala/TestConfigs.scala
index 81098131..1de621e8 100644
--- a/src/main/scala/TestConfigs.scala
+++ b/src/main/scala/TestConfigs.scala
@@ -185,7 +185,7 @@ class WithUnitTest extends Config(
 class WithTraceGen extends Config(
   topDefinitions = (pname, site, here) => pname match {
     case GroundTestKey => Seq.fill(site(NTiles)) {
-      GroundTestTileSettings(cached = 1)
+      GroundTestTileSettings(uncached = 1, cached = 1)
     }
     case BuildGroundTest =>
       (p: Parameters) => Module(new GroundTestTraceGenerator()(p))
@@ -193,7 +193,7 @@ class WithTraceGen extends Config(
       maxRequests = 256,
       startAddress = 0)
     case AddressBag => {
-      val nSets = 16
+      val nSets = 32 // L2 NSets
       val nWays = 1
       val blockOffset = site(CacheBlockOffsetBits)
       List.tabulate(2 * nWays) { i =>
@@ -205,6 +205,8 @@ class WithTraceGen extends Config(
   knobValues = {
     case "L1D_SETS" => 16
     case "L1D_WAYS" => 1
+    case "L2_CAPACITY_IN_KB" => 32 * 64 / 1024
+    case "L2_WAYS"  => 1
   })
 
 class GroundTestConfig extends Config(new WithGroundTest ++ new BaseConfig)
@@ -254,6 +256,7 @@ class TraceGenConfig extends Config(
 class TraceGenBufferlessConfig extends Config(
   new WithBufferlessBroadcastHub ++ new TraceGenConfig)
 class TraceGenL2Config extends Config(
+  new WithNL2Ways(1) ++ new WithL2Capacity(32 * 64 / 1024) ++
   new WithL2Cache ++ new TraceGenConfig)
 
 class MIF128BitComparatorConfig extends Config(
diff --git a/uncore b/uncore
index 384655ea..ad95aa79 160000
--- a/uncore
+++ b/uncore
@@ -1 +1 @@
-Subproject commit 384655ea7b09f9d14014737a2cba1a9489151900
+Subproject commit ad95aa79ce2aa694fa628c5f1cab101676581f0e