From ecd069dca4bb8df475edb6d00054745ce0e9fd13 Mon Sep 17 00:00:00 2001 From: "Wesley W. Terpstra" Date: Thu, 15 Feb 2018 19:09:37 -0800 Subject: [PATCH] tilelink: allow FIFO caches Probably not a smart thing to build, but not illegal! --- src/main/scala/tilelink/Parameters.scala | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/main/scala/tilelink/Parameters.scala b/src/main/scala/tilelink/Parameters.scala index 3ab22ee1..1ebf14b8 100644 --- a/src/main/scala/tilelink/Parameters.scala +++ b/src/main/scala/tilelink/Parameters.scala @@ -186,7 +186,7 @@ case class TLClientParameters( name: String, sourceId: IdRange = IdRange(0,1), nodePath: Seq[BaseNode] = Seq(), - requestFifo: Boolean = false, // only a request, not a requirement + requestFifo: Boolean = false, // only a request, not a requirement. applies to A, not C. // Supports both Probe+Grant of these sizes supportsProbe: TransferSizes = TransferSizes.none, supportsArithmetic: TransferSizes = TransferSizes.none, @@ -204,8 +204,6 @@ case class TLClientParameters( require (supportsProbe.contains(supportsPutFull)) require (supportsProbe.contains(supportsPutPartial)) require (supportsProbe.contains(supportsHint)) - // If you need FIFO, you better not be TL-C (due to independent A vs. C order) - require (!requestFifo || !supportsProbe) val maxTransfer = List( supportsProbe.max,