From eaf474a08103ed61116a4bd94306ea469d095913 Mon Sep 17 00:00:00 2001 From: "Wesley W. Terpstra" Date: Mon, 13 Mar 2017 13:16:17 -0700 Subject: [PATCH] LFSR: use random intial value of the start register We just need to make sure it doesn't initialize randomly stuck at 0. --- src/main/scala/uncore/tilelink2/Fuzzer.scala | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/main/scala/uncore/tilelink2/Fuzzer.scala b/src/main/scala/uncore/tilelink2/Fuzzer.scala index 73b4a032..b186f232 100644 --- a/src/main/scala/uncore/tilelink2/Fuzzer.scala +++ b/src/main/scala/uncore/tilelink2/Fuzzer.scala @@ -37,10 +37,11 @@ object LFSR64 def apply(increment: Bool = Bool(true)): UInt = { val wide = 64 - val undef = Reg(UInt(width = wide)) // random value based on simulation seed - val lfsr = RegInit(Mux(undef === UInt(0), UInt(1), undef)) + val lfsr = Reg(UInt(width = wide)) // random initial value based on simulation seed val xor = lfsr(0) ^ lfsr(1) ^ lfsr(3) ^ lfsr(4) - when (increment) { lfsr := Cat(xor, lfsr(wide-1,1)) } + when (increment) { + lfsr := Mux(lfsr === UInt(0), UInt(1), Cat(xor, lfsr(wide-1,1))) + } lfsr } }