riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

Remove rocc memory simplifye module (Hwacha has its own)

Browse Source
This commit is contained in:
Stephen Twigg 2013-11-05 15:31:03 -08:00
parent 12f0369e6e
commit eae571e371
1 changed files with 1 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
rocket/src/main/scala/tile.scala
View File

@ -50,11 +50,9 @@ class Tile(resetSignal: Bool = null)(confIn: RocketConfiguration) extends Module
ptw.io.requestor(1) <> dcache.io.cpu.ptw ptw.io.requestor(1) <> dcache.io.cpu.ptw
if (!conf.rocc.isEmpty) { if (!conf.rocc.isEmpty) {
val dcIF = Module(new SimpleHellaCacheIF)
val rocc = Module((conf.rocc.get)(conf)) val rocc = Module((conf.rocc.get)(conf))
dcIF.io.requestor <> rocc.io.mem
core.io.rocc <> rocc.io core.io.rocc <> rocc.io
dcacheArb.io.requestor(2) <> dcIF.io.cache dcacheArb.io.requestor(2) <> rocc.io.mem
} }
core.io.host <> io.host core.io.host <> io.host