From edcd2c696c8cf93ca7ac1269bcaed3a14f4c268c Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Sat, 29 Jul 2017 11:47:58 -0700 Subject: [PATCH 1/2] Avoid needless stall on E-channel back pressure --- src/main/scala/rocket/DCache.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/rocket/DCache.scala b/src/main/scala/rocket/DCache.scala index fd83e9ef..45fe77b4 100644 --- a/src/main/scala/rocket/DCache.scala +++ b/src/main/scala/rocket/DCache.scala @@ -397,7 +397,7 @@ class DCacheModule(outer: DCache) extends HellaCacheModule(outer) { val blockProbeAfterGrantCount = Reg(init=UInt(0)) when (blockProbeAfterGrantCount > 0) { blockProbeAfterGrantCount := blockProbeAfterGrantCount - 1 } val canAcceptCachedGrant = if (cacheParams.acquireBeforeRelease) release_state === s_ready else true.B - tl_out.d.ready := Mux(grantIsCached, tl_out.e.ready && canAcceptCachedGrant, true.B) + tl_out.d.ready := Mux(grantIsCached, (!d_first || tl_out.e.ready) && canAcceptCachedGrant, true.B) when (tl_out.d.fire()) { when (grantIsCached) { grantInProgress := true From ac4339a8e7ca10946000d808137ba26313bbad78 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Sat, 29 Jul 2017 11:48:36 -0700 Subject: [PATCH 2/2] Pass D$ backpressure to D-channel, rather than asserting --- src/main/scala/rocket/DCache.scala | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/main/scala/rocket/DCache.scala b/src/main/scala/rocket/DCache.scala index 45fe77b4..e865afeb 100644 --- a/src/main/scala/rocket/DCache.scala +++ b/src/main/scala/rocket/DCache.scala @@ -432,9 +432,10 @@ class DCacheModule(outer: DCache) extends HellaCacheModule(outer) { } // data refill - val doRefillBeat = grantIsRefill && tl_out.d.fire() - dataArb.io.in(1).valid := doRefillBeat - assert(dataArb.io.in(1).ready || !doRefillBeat) + // note this ready-valid signaling ignores E-channel backpressure, which + // benignly means the data RAM might occasionally be redundantly written + dataArb.io.in(1).valid := tl_out.d.valid && grantIsRefill && canAcceptCachedGrant + when (grantIsRefill && !dataArb.io.in(1).ready) { tl_out.d.ready := false } dataArb.io.in(1).bits.write := true dataArb.io.in(1).bits.addr := s2_req_block_addr | d_address_inc dataArb.io.in(1).bits.way_en := s2_victim_way