riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

Add a check that MaxHartIdBits is enough for all hartids (#1054)

Browse Source 
* Add a check that MaxHartIdBits is enough for all hartids

* Correct off-by-one error in hartid check
This commit is contained in:
Megan Wachs
2017-10-13 15:20:35 -07:00
committed by GitHub
parent 1852ccd8f3
commit e9e05b5f3b
1 changed files with 3 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/main/scala/tile/RocketTile.scala
View File

@@ -27,7 +27,9 @@ case class RocketTileParams(
require(dcache.isDefined)
}
abstract class HartedTile(tileParams: TileParams, val hartid: Int)(implicit p: Parameters) extends BaseTile(tileParams)(p)
abstract class HartedTile(tileParams: TileParams, val hartid: Int)(implicit p: Parameters) extends BaseTile(tileParams)(p) {
require (log2Up(hartid + 1) <= p(MaxHartIdBits), s"p(MaxHartIdBits) of ${p(MaxHartIdBits)} is not enough for hartid ${hartid}")
}
class RocketTile(val rocketParams: RocketTileParams)(implicit p: Parameters) extends HartedTile(rocketParams, rocketParams.hartid)(p)
with HasExternalInterrupts