riscv/rocket-chip
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Improve DCache MMIO QoR

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No need to store the cmd field.  From the perspective of the cache, all
MMIO responses that have data can be treated the same as loads.
This commit is contained in:
Andrew Waterman 2017-03-23 13:18:32 -07:00
parent fb6498f2c3
commit e9cadf29d2
1 changed files with 1 additions and 1 deletions
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src/main/scala/rocket/DCache.scala
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@ -312,7 +312,7 @@ class DCacheModule(outer: DCache) extends HellaCacheModule(outer) {
val req = uncachedReqs(tl_out.d.bits.source) val req = uncachedReqs(tl_out.d.bits.source)
when (grantIsUncachedData) { when (grantIsUncachedData) {
s2_data := tl_out.d.bits.data s2_data := tl_out.d.bits.data
s2_req.cmd := req.cmd s2_req.cmd := M_XRD
s2_req.typ := req.typ s2_req.typ := req.typ
s2_req.tag := req.tag s2_req.tag := req.tag
s2_req.addr := Cat(s1_paddr >> beatOffBits /* don't-care */, req.addr(beatOffBits-1, 0)) s2_req.addr := Cat(s1_paddr >> beatOffBits /* don't-care */, req.addr(beatOffBits-1, 0))