riscv/rocket-chip
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update chisel to work around xilinx ise bug

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This commit is contained in:
Andrew Waterman 2013-05-03 01:47:15 -07:00
parent d825c9d6e9
commit e8fcdb56a6
1 changed files with 1 additions and 1 deletions
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chisel

@ -1 +1 @@
Subproject commit b5b72e5b98b42ce5fb16c1d8c5d0e618955d9340
Subproject commit 6a602a8dec2131d4ba2db1e4dfa8e46027985b7c