riscv/rocket-chip
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regression: remove cde submodule update

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This commit is contained in:
Wesley W. Terpstra 2016-11-22 01:53:35 -08:00
parent a93d34742a
commit e8e95d4bcf
4 changed files with 3 additions and 10 deletions
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2
Makefrag
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@ -27,7 +27,7 @@ $(FIRRTL_JAR): $(shell find $(base_dir)/firrtl/src/main/scala -iname "*.scala")
cp -p $(FIRRTL_JAR) $(base_dir)/chisel3/lib cp -p $(FIRRTL_JAR) $(base_dir)/chisel3/lib
src_path := src/main/scala src_path := src/main/scala
default_submodules := . hardfloat context-dependent-environments chisel3 default_submodules := . hardfloat chisel3
chisel_srcs := $(foreach submodule,$(default_submodules) $(ROCKETCHIP_ADDONS),$(shell find $(base_dir)/$(submodule)/$(src_path) -name "*.scala")) chisel_srcs := $(foreach submodule,$(default_submodules) $(ROCKETCHIP_ADDONS),$(shell find $(base_dir)/$(submodule)/$(src_path) -name "*.scala"))
disasm := 2> disasm := 2>

6
README.md
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@ -139,12 +139,6 @@ has an additional bit) to handle subnormal numbers more efficiently in
the processor. Please take a look at the the processor. Please take a look at the
[README](https://github.com/ucb-bar/berkeley-hardfloat/blob/master/README.md) [README](https://github.com/ucb-bar/berkeley-hardfloat/blob/master/README.md)
in the repository for more information. in the repository for more information.
* **context-dependent-environments**
([https://github.com/ucb-bar/context-dependent-environments](https://github.com/ucb-bar/context-dependent-environments)):
The rocket-chip Chisel code is highly parameterizable, and utilizes the classes in
this subrepo to set and pass parameters to different levels of the design. Note that in
Chisel2, this was handled by Chisel itself, but has been moved into a seperate
library for use with Chisel3.
* **riscv-tools** * **riscv-tools**
([https://github.com/riscv/riscv-tools](https://github.com/riscv/riscv-tools)): ([https://github.com/riscv/riscv-tools](https://github.com/riscv/riscv-tools)):
We tag a version of riscv-tools that works with the RTL committed in the We tag a version of riscv-tools that works with the RTL committed in the

3
project/build.scala
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@ -17,9 +17,8 @@ object BuildSettings extends Build {
) )
lazy val chisel = project in file("chisel3") lazy val chisel = project in file("chisel3")
lazy val cde = project in file("context-dependent-environments")
lazy val hardfloat = project.dependsOn(chisel) lazy val hardfloat = project.dependsOn(chisel)
lazy val rocketchip = (project in file(".")).settings(chipSettings).dependsOn(chisel, cde, hardfloat) lazy val rocketchip = (project in file(".")).settings(chipSettings).dependsOn(chisel, hardfloat)
lazy val addons = settingKey[Seq[String]]("list of addons used for this build") lazy val addons = settingKey[Seq[String]]("list of addons used for this build")
lazy val make = inputKey[Unit]("trigger backend-specific makefile command") lazy val make = inputKey[Unit]("trigger backend-specific makefile command")

2
regression/Makefile
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@ -111,7 +111,7 @@ vsim-bmark-tests: $(VSIM_BMARK_TEST_STAMPS)
vsim-regression-tests: $(VSIM_REGRESSION_TEST_STAMPS) vsim-regression-tests: $(VSIM_REGRESSION_TEST_STAMPS)
vsim-torture: $(VSIM_TORTURE_STAMPS) vsim-torture: $(VSIM_TORTURE_STAMPS)
submodule_names = chisel3 context-dependent-environments firrtl torture hardfloat $(ROCKETCHIP_ADDONS) submodule_names = chisel3 firrtl torture hardfloat $(ROCKETCHIP_ADDONS)
# Checks out all the rocket-chip submodules # Checks out all the rocket-chip submodules
stamps/other-submodules.stamp: stamps/other-submodules.stamp: