From e5cfc2dac1a0b055bac8eb021404e1af4c7ee1a6 Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Fri, 10 Jun 2016 14:04:28 -0700 Subject: [PATCH] Add a Smi to TileLink converter (#59) I'm trying to get someone to attach their stuff to Rocket Chip for the upcoming tapout. TileLink sounded too complicated, but Smi went over well. Since the mmioNetwork in Rocket Chip is based on TileLink, it seemed like the easiest thing to do was to write a TileLink to Smi converter so people could use it. It turns out there was already one inside the groundtest unit tests, so I just moved that into uncore (it was inlined into a test case so you couldn't actually use it before). Internally the converter uses Nasti, but I figured that's good enough for now. --- uncore/src/main/scala/smi.scala | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 uncore/src/main/scala/smi.scala diff --git a/uncore/src/main/scala/smi.scala b/uncore/src/main/scala/smi.scala new file mode 100644 index 00000000..dc8b158e --- /dev/null +++ b/uncore/src/main/scala/smi.scala @@ -0,0 +1,31 @@ +// See LICENSE for details + +package uncore + +import Chisel._ +import junctions._ +import cde.Parameters + +/** Convert TileLink protocol to Smi protocol */ +class SmiIOTileLinkIOConverter(val dataWidth: Int, val addrWidth: Int) + (implicit p: Parameters) extends Module { + val io = new Bundle { + val tl = (new ClientUncachedTileLinkIO).flip + val smi = new SmiIO(dataWidth, addrWidth) + } + + def decoupledNastiConnect(outer: NastiIO, inner: NastiIO) { + outer.ar <> Queue(inner.ar) + outer.aw <> Queue(inner.aw) + outer.w <> Queue(inner.w) + inner.r <> Queue(outer.r) + inner.b <> Queue(outer.b) + } + + val tl2nasti = Module(new NastiIOTileLinkIOConverter()) + val nasti2smi = Module(new SmiIONastiIOConverter(dataWidth, addrWidth)) + + tl2nasti.io.tl <> io.tl + decoupledNastiConnect(nasti2smi.io.nasti, tl2nasti.io.nasti) + io.smi <> nasti2smi.io.smi +}