tile: remove PAddrBits in favor of SharedMemoryTLEdge

2017-08-31 18:48:59 -07:00
parent e7de7f3e82
commit e46aeb7342
9 changed files with 16 additions and 16 deletions
--- a/src/main/scala/tile/BaseTile.scala
+++ b/src/main/scala/tile/BaseTile.scala
@ -34,6 +34,7 @@ trait HasTileParameters {
  val usingBTB = tileParams.btb.isDefined && tileParams.btb.get.nEntries > 0
  val usingPTW = usingVM
  val usingDataScratchpad = tileParams.dcache.flatMap(_.scratch).isDefined
+
  val hartIdLen = p(MaxHartIdBits)

  def dcacheArbPorts = 1 + usingVM.toInt + usingDataScratchpad.toInt + tileParams.rocc.size