From e450e3aa40fb78e74530d83eefc02e4fe83330d0 Mon Sep 17 00:00:00 2001 From: Yunsup Lee Date: Tue, 20 Mar 2012 17:09:54 -0700 Subject: [PATCH] fix irt counter bug regarding vector stuff --- rocket/src/main/scala/ctrl.scala | 3 ++- rocket/src/main/scala/ctrl_vec.scala | 4 ++-- rocket/src/main/scala/dpath_vec.scala | 1 - 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/rocket/src/main/scala/ctrl.scala b/rocket/src/main/scala/ctrl.scala index 7f9a4e6f..f3cc2284 100644 --- a/rocket/src/main/scala/ctrl.scala +++ b/rocket/src/main/scala/ctrl.scala @@ -439,6 +439,7 @@ class rocketCtrl extends Component io.vec_dpath <> vec.io.dpath io.vec_iface <> vec.io.iface + vec.io.valid := wb_reg_valid vec.io.s := io.dpath.status(SR_S) vec.io.sr_ev := io.dpath.status(SR_EV) vec.io.exception := wb_reg_exception @@ -833,7 +834,7 @@ class rocketCtrl extends Component io.dpath.ex_wen := ex_reg_wen; io.dpath.mem_wen := mem_reg_wen; io.dpath.wb_wen := wb_reg_wen; - io.dpath.wb_valid := wb_reg_valid; + io.dpath.wb_valid := wb_reg_valid && !vec_replay io.dpath.sel_wa := id_sel_wa.toBool; io.dpath.sel_wb := id_sel_wb; io.dpath.ren_pcr := id_ren_pcr.toBool; diff --git a/rocket/src/main/scala/ctrl_vec.scala b/rocket/src/main/scala/ctrl_vec.scala index 62dba213..4786cb6f 100644 --- a/rocket/src/main/scala/ctrl_vec.scala +++ b/rocket/src/main/scala/ctrl_vec.scala @@ -7,7 +7,6 @@ import Instructions._ class ioCtrlDpathVec extends Bundle { - val valid = Bool(INPUT) val inst = Bits(32, INPUT) val appvl0 = Bool(INPUT) val pfq = Bool(INPUT) @@ -59,6 +58,7 @@ class ioCtrlVec extends Bundle { val dpath = new ioCtrlDpathVec() val iface = new ioCtrlVecInterface() + val valid = Bool(INPUT) val s = Bool(INPUT) val sr_ev = Bool(INPUT) val exception = Bool(INPUT) @@ -144,7 +144,7 @@ class rocketCtrlVec extends Component val wb_vec_pfcmdq_enq :: wb_vec_pfximm1q_enq :: wb_vec_pfximm2q_enq :: wb_vec_pfcntq_enq :: veccs2 = veccs1 val wb_vec_pfaq :: wb_vec_fence_cv :: wb_vec_xcptevac :: wb_vec_xcptkill :: wb_vec_xcptwait :: wb_vec_xcpthold :: Nil = veccs2 - val valid_common = io.dpath.valid && io.sr_ev && wb_vec_val && !(wb_vec_appvlmask && io.dpath.appvl0) + val valid_common = io.valid && io.sr_ev && wb_vec_val && !(wb_vec_appvlmask && io.dpath.appvl0) val wb_vec_pfcmdq_enq_mask_pfq = wb_vec_pfcmdq_enq && (!wb_vec_pfaq || io.dpath.pfq) val wb_vec_pfximm1q_enq_mask_pfq = wb_vec_pfximm1q_enq && (!wb_vec_pfaq || io.dpath.pfq) diff --git a/rocket/src/main/scala/dpath_vec.scala b/rocket/src/main/scala/dpath_vec.scala index f36bff23..5fcd20a7 100644 --- a/rocket/src/main/scala/dpath_vec.scala +++ b/rocket/src/main/scala/dpath_vec.scala @@ -164,7 +164,6 @@ class rocketDpathVec extends Component io.iface.evac_addr := io.wdata - io.ctrl.valid := io.valid io.ctrl.inst := io.inst io.ctrl.appvl0 := reg_appvl0 io.ctrl.pfq := io.rs2(0)