riscv/rocket-chip
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change submodule pointers to https

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This commit is contained in:
Yunsup Lee 2014-10-07 03:16:20 -07:00
parent 447761b06c
commit e1b8f69cb5
1 changed files with 7 additions and 7 deletions
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14
.gitmodules vendored
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@ -1,21 +1,21 @@
[submodule "uncore"] [submodule "uncore"]
path = uncore path = uncore
url = git@github.com:ucb-bar/uncore.git url = https://github.com/ucb-bar/uncore.git
[submodule "dramsim2"] [submodule "dramsim2"]
path = dramsim2 path = dramsim2
url = git@github.com:dramninjasUMD/DRAMSim2.git url = https://github.com/dramninjasUMD/DRAMSim2.git
[submodule "riscv-tools"] [submodule "riscv-tools"]
path = riscv-tools path = riscv-tools
url = git@github.com:ucb-bar/riscv-tools.git url = https://github.com/ucb-bar/riscv-tools.git
[submodule "rocket"] [submodule "rocket"]
path = rocket path = rocket
url = git@github.com:ucb-bar/rocket-staging.git url = https://github.com/ucb-bar/rocket-staging.git
[submodule "chisel"] [submodule "chisel"]
path = chisel path = chisel
url = git@github.com:ucb-bar/chisel.git url = https://github.com/ucb-bar/chisel.git
[submodule "hardfloat"] [submodule "hardfloat"]
path = hardfloat path = hardfloat
url = git@github.com:ucb-bar/berkeley-hardfloat.git url = https://github.com/ucb-bar/berkeley-hardfloat.git
[submodule "fpga-zynq"] [submodule "fpga-zynq"]
path = fpga-zynq path = fpga-zynq
url = git@github.com:ucb-bar/fpga-zynq.git url = https://github.com/ucb-bar/fpga-zynq.git