riscv/rocket-chip
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Fix zscale testing

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Use the following command in vsim:

make CONFIG=ZscaleConfig MODEL=ZscaleTop TB=ZscaleTestHarness run-asm-tests
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Andrew Waterman committed 2015-12-01 17:31:48 -08:00
1 parent 5eeb8969f6
commit e0d849fec5
5 files changed
+15 -2
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fsim/Makefrag
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@@ -15,7 +15,7 @@ sim_vsrcs = \
# C sources
sim_csrcs = \
$(base_dir)/csrc/vcs_main.cc \
$(base_dir)/csrc/vcs_main.$(TB).cc \
$(base_dir)/csrc/mm.cc \
$(base_dir)/csrc/mm_dramsim2.cc \