make halt_and_catch_fire Optional
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28b635e721
commit
e0b9f9213a
@ -132,7 +132,9 @@ class RocketTile(val rocketParams: RocketTileParams, val hartid: Int)(implicit p
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class RocketTileBundle(outer: RocketTile) extends BaseTileBundle(outer)
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with HasExternalInterruptsBundle
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with CanHaveScratchpadBundle
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with CanHaltAndCatchFire
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with CanHaltAndCatchFire {
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val halt_and_catch_fire = outer.rocketParams.hcfOnUncorrectable.option(Bool(OUTPUT))
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}
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class RocketTileModule(outer: RocketTile) extends BaseTileModule(outer, () => new RocketTileBundle(outer))
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with HasExternalInterruptsModule
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@ -145,7 +147,7 @@ class RocketTileModule(outer: RocketTile) extends BaseTileModule(outer, () => ne
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decodeCoreInterrupts(core.io.interrupts) // Decode the interrupt vector
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core.io.hartid := io.hartid // Pass through the hartid
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io.trace.foreach { _ := core.io.trace }
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io.halt_and_catch_fire := (if(outer.rocketParams.hcfOnUncorrectable) uncorrectable else false.B)
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io.halt_and_catch_fire.foreach { _ := uncorrectable }
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outer.frontend.module.io.cpu <> core.io.imem
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outer.frontend.module.io.reset_vector := io.reset_vector
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outer.frontend.module.io.hartid := io.hartid
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@ -228,12 +230,13 @@ abstract class RocketTileWrapper(rtp: RocketTileParams, hartid: Int)(implicit p:
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val asyncInterrupts = asyncIntNode.bundleIn
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val periphInterrupts = periphIntNode.bundleIn
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val coreInterrupts = coreIntNode.bundleIn
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val halt_and_catch_fire = rocket.module.io.halt_and_catch_fire.map(_.cloneType)
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}
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// signals that do not change based on crossing type:
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rocket.module.io.hartid := io.hartid
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rocket.module.io.reset_vector := io.reset_vector
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io.trace.foreach { _ := rocket.module.io.trace.get }
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io.halt_and_catch_fire := rocket.module.io.halt_and_catch_fire
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io.halt_and_catch_fire.foreach { _ := rocket.module.io.halt_and_catch_fire.get }
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}
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}
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@ -27,7 +27,7 @@ trait Clocked extends Bundle {
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}
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trait CanHaltAndCatchFire extends Bundle {
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val halt_and_catch_fire = Bool(OUTPUT)
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val halt_and_catch_fire: Option[Bool]
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}
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object DecoupledHelper {
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