riscv/rocket-chip
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Make PMP tolerant to PA size << VA size

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Andrew Waterman 2017-04-15 00:54:49 -07:00 committed by Yunsup Lee
parent aad4f350bf
commit debcbca7de
1 changed files with 2 additions and 2 deletions
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src/main/scala/rocket/PMP.scala
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@ -80,7 +80,7 @@ class PMP(implicit p: Parameters) extends PMPReg {
prev.lowerBoundMatch(x, lgSize, lgMaxSize) && upperBoundMatch(x, lgMaxSize) prev.lowerBoundMatch(x, lgSize, lgMaxSize) && upperBoundMatch(x, lgMaxSize)
private def pow2Homogeneous(x: UInt, pgLevel: UInt) = { private def pow2Homogeneous(x: UInt, pgLevel: UInt) = {
val maskHomogeneous = pgLevelMap { idxBits => mask(idxBits - 1) } (pgLevel) val maskHomogeneous = pgLevelMap { idxBits => if (idxBits > paddrBits) false.B else mask(idxBits - 1) } (pgLevel)
maskHomogeneous || (pgLevelMap { idxBits => ((x ^ comparand) >> idxBits) =/= 0 } (pgLevel)) maskHomogeneous || (pgLevelMap { idxBits => ((x ^ comparand) >> idxBits) =/= 0 } (pgLevel))
} }
@ -92,7 +92,7 @@ class PMP(implicit p: Parameters) extends PMPReg {
val beginsAfterLower = !(x < prev.comparand) val beginsAfterLower = !(x < prev.comparand)
val beginsAfterUpper = !(x < comparand) val beginsAfterUpper = !(x < comparand)
val pgMask = pgLevelMap { idxBits => ((BigInt(1) << paddrBits) - (BigInt(1) << idxBits)).U } (pgLevel) val pgMask = pgLevelMap { idxBits => (((BigInt(1) << paddrBits) - (BigInt(1) << idxBits)) max 0).U } (pgLevel)
val endsBeforeLower = (x & pgMask) < (prev.comparand & pgMask) val endsBeforeLower = (x & pgMask) < (prev.comparand & pgMask)
val endsBeforeUpper = (x & pgMask) < (comparand & pgMask) val endsBeforeUpper = (x & pgMask) < (comparand & pgMask)