From ddcf1b4099b801a096cf6657f047bf63fe2fc440 Mon Sep 17 00:00:00 2001 From: Henry Cook Date: Mon, 19 Sep 2016 13:23:17 -0700 Subject: [PATCH] Use PROJECT rather than MODEL in name of binary and generated src files. --- Makefrag | 8 ++++-- emulator/Makefile | 5 +--- emulator/Makefrag-verilator | 31 +++++++++++------------ src/main/scala/rocketchip/Generator.scala | 2 +- vsim/Makefile | 3 +-- vsim/Makefrag-verilog | 18 ++++++------- 6 files changed, 33 insertions(+), 34 deletions(-) diff --git a/Makefrag b/Makefrag index a3ff6e37..e76bb737 100644 --- a/Makefrag +++ b/Makefrag @@ -6,6 +6,10 @@ endif MODEL ?= TestHarness PROJECT ?= rocketchip CFG_PROJECT ?= $(PROJECT) +CONFIG ?= DefaultConfig +# TODO: For now must match rocketchip.Generator +long_name = $(PROJECT).$(CONFIG) + CXX ?= g++ CXXFLAGS := -O1 @@ -50,7 +54,7 @@ bootrom_img = $(base_dir)/bootrom/bootrom.img #--------------------------------------------------------------------- # sed uses -E (instead of -r) for BSD support -params_file = $(generated_dir)/$(MODEL).$(CONFIG).prm +params_file = $(generated_dir)/$(long_name).prm consts_header = $(generated_dir)/consts.$(CONFIG).h $(consts_header): $(params_file) echo "#ifndef __CONST_H__" > $@ @@ -58,7 +62,7 @@ $(consts_header): $(params_file) sed -E 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $< >> $@ echo "#endif // __CONST_H__" >> $@ -params_file_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).prm +params_file_debug = $(generated_dir_debug)/$(long_name).prm consts_header_debug = $(generated_dir_debug)/consts.$(CONFIG).h $(consts_header_debug): $(params_file_debug) echo "#ifndef __CONST_H__" > $@ diff --git a/emulator/Makefile b/emulator/Makefile index eb0b881b..32ee7b60 100644 --- a/emulator/Makefile +++ b/emulator/Makefile @@ -6,9 +6,6 @@ generated_dir_debug = $(abspath ./generated-src-debug) sim_dir = . output_dir = $(sim_dir)/output -BACKEND = c -CONFIG ?= DefaultConfig - include $(base_dir)/Makefrag CXXSRCS := emulator SimDTM @@ -36,7 +33,7 @@ test: #-------------------------------------------------------------------- ifneq ($(filter run% %.run %.out %.vpd %.vcd,$(MAKECMDGOALS)),) --include $(generated_dir)/$(MODEL).$(CONFIG).d +-include $(generated_dir)/$(long_name).d endif $(output_dir)/%.run: $(output_dir)/% $(emu) diff --git a/emulator/Makefrag-verilator b/emulator/Makefrag-verilator index 2cf13f33..1767f15b 100644 --- a/emulator/Makefrag-verilator +++ b/emulator/Makefrag-verilator @@ -1,19 +1,18 @@ #-------------------------------------------------------------------- # Verilator Generation #-------------------------------------------------------------------- - -firrtl = $(generated_dir)/$(MODEL).$(CONFIG).fir -firrtl_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).fir -verilog = $(generated_dir)/$(MODEL).$(CONFIG).v -verilog_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).v +firrtl = $(generated_dir)/$(long_name).fir +firrtl_debug = $(generated_dir_debug)/$(long_name).fir +verilog = $(generated_dir)/$(long_name).v +verilog_debug = $(generated_dir_debug)/$(long_name).v .SECONDARY: $(firrtl) $(firrtl_debug) $(verilog) $(verilog_debug) -$(generated_dir)/%.$(CONFIG).fir $(generated_dir)/%.$(CONFIG).prm $(generated_dir)/%.$(CONFIG).d: $(chisel_srcs) $(bootrom_img) +$(generated_dir)/%.fir $(generated_dir)/%.prm $(generated_dir)/%.d: $(chisel_srcs) $(bootrom_img) mkdir -p $(dir $@) cd $(base_dir) && $(SBT) "run $(generated_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)" -$(generated_dir_debug)/%.$(CONFIG).fir $(generated_dir_debug)/%.$(CONFIG).prm $(generated_dir_debug)/%.$(CONFIG).d: $(chisel_srcs) $(bootrom_img) +$(generated_dir_debug)/%.fir $(generated_dir_debug)/%.prm $(generated_dir_debug)/%.d: $(chisel_srcs) $(bootrom_img) mkdir -p $(dir $@) cd $(base_dir) && $(SBT) "run $(generated_dir_debug) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)" @@ -58,19 +57,19 @@ VERILATOR_FLAGS := --top-module $(MODEL) \ cppfiles = $(addprefix $(base_dir)/csrc/, $(addsuffix .cc, $(CXXSRCS))) headers = $(wildcard $(base_dir)/csrc/*.h) -model_header = $(generated_dir)/$(MODEL).$(CONFIG)/V$(MODEL).h -model_header_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG)/V$(MODEL).h +model_header = $(generated_dir)/$(long_name)/V$(MODEL).h +model_header_debug = $(generated_dir_debug)/$(long_name)/V$(MODEL).h $(emu): $(verilog) $(cppfiles) $(headers) $(consts_header) $(INSTALLED_VERILATOR) - mkdir -p $(generated_dir)/$(MODEL).$(CONFIG) - $(VERILATOR) $(VERILATOR_FLAGS) -Mdir $(generated_dir)/$(MODEL).$(CONFIG) \ + mkdir -p $(generated_dir)/$(long_name) + $(VERILATOR) $(VERILATOR_FLAGS) -Mdir $(generated_dir)/$(long_name) \ -o $(abspath $(sim_dir))/$@ $< $(cppfiles) -LDFLAGS "$(LDFLAGS)" \ -CFLAGS "-I$(generated_dir) -include $(model_header) -include $(consts_header)" - $(MAKE) -C $(generated_dir)/$(MODEL).$(CONFIG) -f V$(MODEL).mk + $(MAKE) -C $(generated_dir)/$(long_name) -f V$(MODEL).mk -$(emu_debug): $(verilog_debug) $(cppfiles) $(headers) $(consts_header_debug) $(generated_dir)/$(MODEL).$(CONFIG).d $(INSTALLED_VERILATOR) - mkdir -p $(generated_dir_debug)/$(MODEL).$(CONFIG) - $(VERILATOR) $(VERILATOR_FLAGS) -Mdir $(generated_dir_debug)/$(MODEL).$(CONFIG) --trace \ +$(emu_debug): $(verilog_debug) $(cppfiles) $(headers) $(consts_header_debug) $(generated_dir)/$(long_name).d $(INSTALLED_VERILATOR) + mkdir -p $(generated_dir_debug)/$(long_name) + $(VERILATOR) $(VERILATOR_FLAGS) -Mdir $(generated_dir_debug)/$(long_name) --trace \ -o $(abspath $(sim_dir))/$@ $< $(cppfiles) -LDFLAGS "$(LDFLAGS)" \ -CFLAGS "-I$(generated_dir_debug) -include $(model_header_debug) -include $(consts_header_debug)" - $(MAKE) -C $(generated_dir_debug)/$(MODEL).$(CONFIG) -f V$(MODEL).mk + $(MAKE) -C $(generated_dir_debug)/$(long_name) -f V$(MODEL).mk diff --git a/src/main/scala/rocketchip/Generator.scala b/src/main/scala/rocketchip/Generator.scala index f4f24247..669da10a 100644 --- a/src/main/scala/rocketchip/Generator.scala +++ b/src/main/scala/rocketchip/Generator.scala @@ -77,7 +77,7 @@ trait Generator extends App with HasGeneratorUtilities { lazy val world = config.toInstance lazy val params = Parameters.root(world) lazy val circuit = elaborate(names, params) - lazy val longName = names.topModuleClass + "." + names.configs + lazy val longName = names.topProject + "." + names.configs def writeOutputFiles() { TestGeneration.addSuite(new RegressionTestSuite(params(RegressionTestNames))) diff --git a/vsim/Makefile b/vsim/Makefile index 7d4ea481..769a4c3f 100644 --- a/vsim/Makefile +++ b/vsim/Makefile @@ -17,13 +17,12 @@ sim_dir = . output_dir = $(sim_dir)/output BACKEND ?= v -CONFIG ?= DefaultConfig TB ?= TestDriver include $(base_dir)/Makefrag include $(sim_dir)/Makefrag ifneq ($(filter run% %.run %.out %.vpd %.vcd,$(MAKECMDGOALS)),) --include $(generated_dir)/$(MODEL).$(CONFIG).d +-include $(generated_dir)/$(long_name).d endif include $(base_dir)/vsim/Makefrag-verilog diff --git a/vsim/Makefrag-verilog b/vsim/Makefrag-verilog index 00785e33..c0ab9576 100644 --- a/vsim/Makefrag-verilog +++ b/vsim/Makefrag-verilog @@ -3,27 +3,27 @@ #-------------------------------------------------------------------- # If I don't mark these as .SECONDARY then make will delete these internal # files. -.SECONDARY: $(generated_dir)/$(MODEL).$(CONFIG).fir +.SECONDARY: $(generated_dir)/$(long_name).fir -firrtl: $(generated_dir)/$(MODEL).$(CONFIG).fir +firrtl: $(generated_dir)/$(long_name).fir .PHONY: firrtl -$(generated_dir)/%.$(CONFIG).fir $(generated_dir)/%.$(CONFIG).d $(generated_dir)/%.prm: $(chisel_srcs) $(bootrom_img) +$(generated_dir)/%.fir $(generated_dir)/%.d $(generated_dir)/%.prm: $(chisel_srcs) $(bootrom_img) mkdir -p $(dir $@) - cd $(base_dir) && $(SBT) "run $(generated_dir) $(PROJECT) $(notdir $*) $(CFG_PROJECT) $(CONFIG)" + cd $(base_dir) && $(SBT) "run $(generated_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)" -$(generated_dir)/%.v $(generated_dir)/%.conf : $(generated_dir)/%.fir $(FIRRTL_JAR) +$(generated_dir)/$(long_name).v $(generated_dir)/$(long_name).conf : $(firrtl) $(FIRRTL_JAR) mkdir -p $(dir $@) - $(FIRRTL) -i $< -o $@ -X verilog --inferRW $(MODEL) --replSeqMem -c:$(MODEL):-o:$(generated_dir)/$(MODEL).$(CONFIG).conf + $(FIRRTL) -i $< -o $@ -X verilog --inferRW $(MODEL) --replSeqMem -c:$(MODEL):-o:$(generated_dir)/$(long_name).conf -$(generated_dir)/$(MODEL).$(CONFIG).behav_srams.v : $(generated_dir)/$(MODEL).$(CONFIG).conf $(mem_gen) +$(generated_dir)/$(long_name).behav_srams.v : $(generated_dir)/$(long_name).conf $(mem_gen) cd $(generated_dir) && \ rm -f $@ && \ - $(mem_gen) $(generated_dir)/$(MODEL).$(CONFIG).conf >> $@.tmp && \ + $(mem_gen) $(generated_dir)/$(long_name).conf >> $@.tmp && \ mv $@.tmp $@ -$(generated_dir)/consts.$(CONFIG).vh: $(generated_dir)/$(MODEL).$(CONFIG).prm +$(generated_dir)/consts.$(CONFIG).vh: $(generated_dir)/$(long_name).prm echo "\`ifndef CONST_VH" > $@ echo "\`define CONST_VH" >> $@ sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/`define \1 \2/' $(patsubst %.v,%.prm,$<) >> $@