Add JTAG DTM and test support in simulation

Initial cut

checkpoint which compiles and runs but there is some off-by-1 in the protocol

Debugging the clock crossing logic

checkpoint which works

Clean up the AsyncMailbox black box

src/main/scala/rocketchip/Configs.scala

@@ -122,6 +122,7 @@ class BasePlatformConfig extends Config (
       case BuildCoreplex => (p: Parameters) => Module(new DefaultCoreplex(p))
       case NExtInterrupts => 2
       case AsyncDebugBus => false
+      case IncludeJtagDTM => false
       case AsyncMMIOChannels => false
       case ExtraDevices => Nil
       case ExtraTopPorts => (p: Parameters) => new Bundle
@@ -277,4 +278,18 @@ class WithTestRAM extends Config(
       }
       Seq(new TestRAMDevice)
     }
-  })
+  }
+)
+
+class WithAsyncDebug extends Config (
+  (pname, site, here) => pname match {
+     case AsyncDebugBus => true
+  }
+)
+
+
+class WithJtagDTM extends Config (
+  (pname, site, here) => pname match {
+     case IncludeJtagDTM => true
+  }
+)