diff --git a/src/main/scala/diplomacy/LazyModule.scala b/src/main/scala/diplomacy/LazyModule.scala index 68fa825c..972963c5 100644 --- a/src/main/scala/diplomacy/LazyModule.scala +++ b/src/main/scala/diplomacy/LazyModule.scala @@ -54,7 +54,7 @@ abstract class LazyModule()(implicit val p: Parameters) def module: LazyModuleImp protected[diplomacy] def instantiate() = { - children.reverse.foreach { c => + children.reverse.foreach { c => // !!! fix chisel3 so we can pass the desired sourceInfo // implicit val sourceInfo = c.module.outer.info Module(c.module) @@ -62,13 +62,14 @@ abstract class LazyModule()(implicit val p: Parameters) bindings.reverse.foreach { f => f () } } - def omitGraphML = nodes.isEmpty && children.isEmpty + def omitGraphML: Boolean = !nodes.exists(!_.omitGraphML) && !children.exists(!_.omitGraphML) lazy val graphML: String = parent.map(_.graphML).getOrElse { val buf = new StringBuilder buf ++= "\n" buf ++= "\n" buf ++= " \n" buf ++= " \n" + buf ++= " \n" buf ++= " \n" nodesGraphML(buf, " ") edgesGraphML(buf, " ") @@ -84,7 +85,9 @@ abstract class LazyModule()(implicit val p: Parameters) buf ++= s"""${pad} ${module.instanceName}\n""" buf ++= s"""${pad} \n""" nodes.filter(!_.omitGraphML).foreach { n => - buf ++= s"""${pad} \n""" + buf ++= s"""${pad} \n""" + buf ++= s"""${pad} ${n.nodedebugstring}\n""" + buf ++= s"""${pad} \n""" } children.filter(!_.omitGraphML).foreach { _.nodesGraphML(buf, pad + " ") } buf ++= s"""${pad} \n""" @@ -94,16 +97,26 @@ abstract class LazyModule()(implicit val p: Parameters) nodes.filter(!_.omitGraphML) foreach { n => n.outputs.filter(!_._1.omitGraphML).foreach { case (o, l) => buf ++= pad buf ++= """" - buf ++= s"""""" + if (o.reverse) { + buf ++= s""" target=\"${index}::${n.index}\"""" + buf ++= s""" source=\"${o.lazyModule.index}::${o.index}\">""" + } else { + buf ++= s""" source=\"${index}::${n.index}\"""" + buf ++= s""" target=\"${o.lazyModule.index}::${o.index}\">""" + } + buf ++= s"""""" + if (o.reverse) { + buf ++= s"""""" + } else { + buf ++= s"""""" + } buf ++= s"""""" buf ++= s"""${l}""" buf ++= s"""\n""" } } children.filter(!_.omitGraphML).foreach { c => c.edgesGraphML(buf, pad) } } - + def nodeIterator(iterfunc: (LazyModule) => Unit): Unit = { iterfunc(this) children.foreach( _.nodeIterator(iterfunc) ) diff --git a/src/main/scala/diplomacy/Nodes.scala b/src/main/scala/diplomacy/Nodes.scala index 2080e8c0..43db07b7 100644 --- a/src/main/scala/diplomacy/Nodes.scala +++ b/src/main/scala/diplomacy/Nodes.scala @@ -17,6 +17,7 @@ trait InwardNodeImp[DI, UI, EI, BI <: Data] def edgeI(pd: DI, pu: UI): EI def bundleI(ei: EI): BI def colour: String + def reverse: Boolean = false def connect(bindings: () => Seq[(EI, BI, BI)])(implicit p: Parameters, sourceInfo: SourceInfo): (Option[LazyModule], () => Unit) = { (None, () => bindings().foreach { case (_, i, o) => i <> o }) } @@ -60,12 +61,14 @@ abstract class BaseNode def nodename = getClass.getName.split('.').last def name = lazyModule.name + "." + nodename def omitGraphML = outputs.isEmpty && inputs.isEmpty + lazy val nodedebugstring: String = "" protected[diplomacy] def gci: Option[BaseNode] // greatest common inner protected[diplomacy] def gco: Option[BaseNode] // greatest common outer protected[diplomacy] def outputs: Seq[(BaseNode, String)] protected[diplomacy] def inputs: Seq[(BaseNode, String)] protected[diplomacy] def colour: String + protected[diplomacy] def reverse: Boolean } case class NodeHandle[DI, UI, BI <: Data, DO, UO, BO <: Data] @@ -260,6 +263,7 @@ abstract class MixedNode[DI, UI, EI, BI <: Data, DO, UO, EO, BO <: Data]( // meta-data for printing the node graph protected[diplomacy] def colour = inner.colour + protected[diplomacy] def reverse = inner.reverse protected[diplomacy] def outputs = oPorts.map(_._2) zip edgesOut.map(e => outer.labelO(e)) protected[diplomacy] def inputs = iPorts.map(_._2) zip edgesIn .map(e => inner.labelI(e)) } diff --git a/src/main/scala/rocket/Tile.scala b/src/main/scala/rocket/Tile.scala index bec3190c..eef8f5a1 100644 --- a/src/main/scala/rocket/Tile.scala +++ b/src/main/scala/rocket/Tile.scala @@ -160,7 +160,7 @@ class SyncRocketTile(rtp: RocketTileParams, hartid: Int)(implicit p: Parameters) val masterNode = TLOutputNode() masterNode :=* rocket.masterNode - val slaveNode = TLInputNode() + val slaveNode = new TLInputNode() { override def reverse = true } rocket.slaveNode :*= slaveNode val intNode = IntInputNode() @@ -194,7 +194,7 @@ class AsyncRocketTile(rtp: RocketTileParams, hartid: Int)(implicit p: Parameters source.node :=* rocket.masterNode masterNode :=* source.node - val slaveNode = TLAsyncInputNode() + val slaveNode = new TLAsyncInputNode() { override def reverse = true } val sink = LazyModule(new TLAsyncCrossingSink) rocket.slaveNode :*= sink.node sink.node :*= slaveNode @@ -226,7 +226,7 @@ class RationalRocketTile(rtp: RocketTileParams, hartid: Int)(implicit p: Paramet source.node :=* rocket.masterNode masterNode :=* source.node - val slaveNode = TLRationalInputNode() + val slaveNode = new TLRationalInputNode() { override def reverse = true } val sink = LazyModule(new TLRationalCrossingSink(util.SlowToFast)) rocket.slaveNode :*= sink.node sink.node :*= slaveNode diff --git a/src/main/scala/uncore/tilelink2/IntNodes.scala b/src/main/scala/uncore/tilelink2/IntNodes.scala index 77aa2e3b..6459f341 100644 --- a/src/main/scala/uncore/tilelink2/IntNodes.scala +++ b/src/main/scala/uncore/tilelink2/IntNodes.scala @@ -70,6 +70,7 @@ object IntImp extends NodeImp[IntSourcePortParameters, IntSinkPortParameters, In def bundleI(ei: IntEdge): Vec[Bool] = Vec(ei.source.num, Bool()) def colour = "#0000ff" // blue + override def reverse = true override def labelI(ei: IntEdge) = ei.source.sources.map(_.range.size).sum.toString override def labelO(eo: IntEdge) = eo.source.sources.map(_.range.size).sum.toString