diplomacy: add :*= and :=* to support flexible # of edges
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@ -71,8 +71,17 @@ trait InwardNodeHandle[DI, UI, BI <: Data]
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val inward: InwardNode[DI, UI, BI]
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val inward: InwardNode[DI, UI, BI]
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def := (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[LazyModule] =
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def := (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[LazyModule] =
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inward.:=(h)(p, sourceInfo)
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inward.:=(h)(p, sourceInfo)
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def :*= (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[LazyModule] =
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inward.:*=(h)(p, sourceInfo)
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def :=* (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[LazyModule] =
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inward.:=*(h)(p, sourceInfo)
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}
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}
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sealed trait NodeBinding
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case object BIND_ONCE extends NodeBinding
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case object BIND_QUERY extends NodeBinding
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case object BIND_STAR extends NodeBinding
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trait InwardNode[DI, UI, BI <: Data] extends BaseNode with InwardNodeHandle[DI, UI, BI]
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trait InwardNode[DI, UI, BI <: Data] extends BaseNode with InwardNodeHandle[DI, UI, BI]
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{
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{
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val inward = this
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val inward = this
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@ -81,21 +90,22 @@ trait InwardNode[DI, UI, BI <: Data] extends BaseNode with InwardNodeHandle[DI,
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require (!numPI.isEmpty, s"No number of inputs would be acceptable to ${name}${lazyModule.line}")
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require (!numPI.isEmpty, s"No number of inputs would be acceptable to ${name}${lazyModule.line}")
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require (numPI.start >= 0, s"${name} accepts a negative number of inputs${lazyModule.line}")
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require (numPI.start >= 0, s"${name} accepts a negative number of inputs${lazyModule.line}")
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private val accPI = ListBuffer[(Int, OutwardNode[DI, UI, BI])]()
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private val accPI = ListBuffer[(Int, OutwardNode[DI, UI, BI], NodeBinding)]()
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private var iRealized = false
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private var iRealized = false
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protected[diplomacy] def iPushed = accPI.size
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protected[diplomacy] def iPushed = accPI.size
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protected[diplomacy] def iPush(index: Int, node: OutwardNode[DI, UI, BI])(implicit sourceInfo: SourceInfo) {
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protected[diplomacy] def iPush(index: Int, node: OutwardNode[DI, UI, BI], binding: NodeBinding)(implicit sourceInfo: SourceInfo) {
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val info = sourceLine(sourceInfo, " at ", "")
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val info = sourceLine(sourceInfo, " at ", "")
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val noIs = numPI.size == 1 && numPI.contains(0)
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val noIs = numPI.size == 1 && numPI.contains(0)
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require (!noIs, s"${name}${lazyModule.line} was incorrectly connected as a sink" + info)
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require (!noIs, s"${name}${lazyModule.line} was incorrectly connected as a sink" + info)
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require (!iRealized, s"${name}${lazyModule.line} was incorrectly connected as a sink after it's .module was used" + info)
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require (!iRealized, s"${name}${lazyModule.line} was incorrectly connected as a sink after it's .module was used" + info)
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accPI += ((index, node))
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accPI += ((index, node, binding))
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}
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}
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private def reqI() = require(numPI.contains(accPI.size), s"${name} has ${accPI.size} inputs, expected ${numPI}${lazyModule.line}")
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protected[diplomacy] lazy val iBindings = { iRealized = true; accPI.result() }
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protected[diplomacy] lazy val iPorts = { iRealized = true; reqI(); accPI.result() }
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protected[diplomacy] val iStar: Int
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protected[diplomacy] val iPortMapping: Seq[(Int, Int)]
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protected[diplomacy] val iParams: Seq[UI]
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protected[diplomacy] val iParams: Seq[UI]
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val bundleIn: Vec[BI]
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val bundleIn: Vec[BI]
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}
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}
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@ -113,21 +123,22 @@ trait OutwardNode[DO, UO, BO <: Data] extends BaseNode with OutwardNodeHandle[DO
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require (!numPO.isEmpty, s"No number of outputs would be acceptable to ${name}${lazyModule.line}")
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require (!numPO.isEmpty, s"No number of outputs would be acceptable to ${name}${lazyModule.line}")
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require (numPO.start >= 0, s"${name} accepts a negative number of outputs${lazyModule.line}")
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require (numPO.start >= 0, s"${name} accepts a negative number of outputs${lazyModule.line}")
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private val accPO = ListBuffer[(Int, InwardNode [DO, UO, BO])]()
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private val accPO = ListBuffer[(Int, InwardNode [DO, UO, BO], NodeBinding)]()
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private var oRealized = false
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private var oRealized = false
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protected[diplomacy] def oPushed = accPO.size
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protected[diplomacy] def oPushed = accPO.size
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protected[diplomacy] def oPush(index: Int, node: InwardNode [DO, UO, BO])(implicit sourceInfo: SourceInfo) {
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protected[diplomacy] def oPush(index: Int, node: InwardNode [DO, UO, BO], binding: NodeBinding)(implicit sourceInfo: SourceInfo) {
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val info = sourceLine(sourceInfo, " at ", "")
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val info = sourceLine(sourceInfo, " at ", "")
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val noOs = numPO.size == 1 && numPO.contains(0)
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val noOs = numPO.size == 1 && numPO.contains(0)
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require (!noOs, s"${name}${lazyModule.line} was incorrectly connected as a source" + info)
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require (!noOs, s"${name}${lazyModule.line} was incorrectly connected as a source" + info)
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require (!oRealized, s"${name}${lazyModule.line} was incorrectly connected as a source after it's .module was used" + info)
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require (!oRealized, s"${name}${lazyModule.line} was incorrectly connected as a source after it's .module was used" + info)
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accPO += ((index, node))
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accPO += ((index, node, binding))
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}
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}
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private def reqO() = require(numPO.contains(accPO.size), s"${name} has ${accPO.size} outputs, expected ${numPO}${lazyModule.line}")
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protected[diplomacy] lazy val oBindings = { oRealized = true; accPO.result() }
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protected[diplomacy] lazy val oPorts = { oRealized = true; reqO(); accPO.result() }
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protected[diplomacy] val oStar: Int
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protected[diplomacy] val oPortMapping: Seq[(Int, Int)]
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protected[diplomacy] val oParams: Seq[DO]
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protected[diplomacy] val oParams: Seq[DO]
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val bundleOut: Vec[BO]
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val bundleOut: Vec[BO]
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}
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}
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@ -141,10 +152,45 @@ class MixedNode[DI, UI, EI, BI <: Data, DO, UO, EO, BO <: Data](
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protected[diplomacy] val numPI: Range.Inclusive)
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protected[diplomacy] val numPI: Range.Inclusive)
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extends BaseNode with InwardNode[DI, UI, BI] with OutwardNode[DO, UO, BO]
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extends BaseNode with InwardNode[DI, UI, BI] with OutwardNode[DO, UO, BO]
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{
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{
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// meta-data for printing the node graph
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protected[diplomacy] lazy val (oPortMapping, iPortMapping, oStar, iStar) = {
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protected[diplomacy] def colour = inner.colour
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val oStars = oBindings.filter { case (_,_,b) => b == BIND_STAR }.size
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protected[diplomacy] def outputs = oPorts.map(_._2) zip edgesOut.map(e => outer.labelO(e))
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val iStars = iBindings.filter { case (_,_,b) => b == BIND_STAR }.size
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protected[diplomacy] def inputs = iPorts.map(_._2) zip edgesIn .map(e => inner.labelI(e))
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require (oStars + iStars <= 1, s"${name} appears beside a :*= ${iStars} times and a :=* ${oStars} times; at most once is allowed${lazyModule.line}")
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val oKnown = oBindings.map { case (_, n, b) => b match {
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case BIND_ONCE => 1
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case BIND_QUERY => n.iStar
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case BIND_STAR => 0 }}.foldLeft(0)(_+_)
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val iKnown = iBindings.map { case (_, n, b) => b match {
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case BIND_ONCE => 1
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case BIND_QUERY => n.oStar
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case BIND_STAR => 0 }}.foldLeft(0)(_+_)
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val oStar = iKnown - oKnown
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val iStar = -oStar
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require (oStars == 0 || oStar >= 0, s"${name} has ${oKnown} outputs and ${iKnown} inputs; cannot assign ${oStar} edges to resolve :=*${lazyModule.line}")
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require (iStars == 0 || iStar >= 0, s"${name} has ${oKnown} outputs and ${iKnown} inputs; cannot assign ${iStar} edges to resolve :*=${lazyModule.line}")
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val oSum = oBindings.map { case (_, n, b) => b match {
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case BIND_ONCE => 1
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case BIND_QUERY => n.iStar
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case BIND_STAR => oStar }}.scanLeft(0)(_+_)
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val iSum = iBindings.map { case (_, n, b) => b match {
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case BIND_ONCE => 1
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case BIND_QUERY => n.oStar
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case BIND_STAR => iStar }}.scanLeft(0)(_+_)
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val oTotal = oSum.lastOption.getOrElse(0)
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val iTotal = iSum.lastOption.getOrElse(0)
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require(numPO.contains(oTotal), s"${name} has ${oTotal} outputs, expected ${numPO}${lazyModule.line}")
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require(numPI.contains(iTotal), s"${name} has ${iTotal} inputs, expected ${numPI}${lazyModule.line}")
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(oSum.init zip oSum.tail, iSum.init zip iSum.tail, oStar, iStar)
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}
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lazy val oPorts = oBindings.flatMap { case (i, n, _) =>
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val (start, end) = n.iPortMapping(i)
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(start until end) map { j => (j, n) }
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}
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lazy val iPorts = iBindings.flatMap { case (i, n, _) =>
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val (start, end) = n.oPortMapping(i)
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(start until end) map { j => (j, n) }
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}
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private def reqE(o: Int, i: Int) = require(i == o, s"${name} has ${i} inputs and ${o} outputs; they must match${lazyModule.line}")
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private def reqE(o: Int, i: Int) = require(i == o, s"${name} has ${i} inputs and ${o} outputs; they must match${lazyModule.line}")
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protected[diplomacy] lazy val oParams: Seq[DO] = {
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protected[diplomacy] lazy val oParams: Seq[DO] = {
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@ -175,20 +221,40 @@ class MixedNode[DI, UI, EI, BI <: Data, DO, UO, EO, BO <: Data](
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lazy val bundleIn = wireI(flipI(inner.bundleI(edgesIn)))
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lazy val bundleIn = wireI(flipI(inner.bundleI(edgesIn)))
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// connects the outward part of a node with the inward part of this node
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// connects the outward part of a node with the inward part of this node
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override def := (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[LazyModule] = {
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private def bind(h: OutwardNodeHandle[DI, UI, BI], binding: NodeBinding)(implicit p: Parameters, sourceInfo: SourceInfo): Option[LazyModule] = {
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val x = this // x := y
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val x = this // x := y
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val y = h.outward
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val y = h.outward
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val info = sourceLine(sourceInfo, " at ", "")
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val info = sourceLine(sourceInfo, " at ", "")
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require (!LazyModule.stack.isEmpty, s"${y.name} cannot be connected to ${x.name} outside of LazyModule scope" + info)
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require (!LazyModule.stack.isEmpty, s"${y.name} cannot be connected to ${x.name} outside of LazyModule scope" + info)
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val i = x.iPushed
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val i = x.iPushed
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val o = y.oPushed
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val o = y.oPushed
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y.oPush(i, x)
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y.oPush(i, x, binding match {
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x.iPush(o, y)
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case BIND_ONCE => BIND_ONCE
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val (out, binding) = inner.connect(y.bundleOut(o), x.bundleIn(i), x.edgesIn(i))
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case BIND_STAR => BIND_QUERY
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LazyModule.stack.head.bindings = binding :: LazyModule.stack.head.bindings
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case BIND_QUERY => BIND_STAR })
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out
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x.iPush(o, y, binding)
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def connect() {
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val (iStart, iEnd) = x.iPortMapping(i)
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val (oStart, oEnd) = y.oPortMapping(o)
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require (iEnd - iStart == oEnd - oStart, s"Bug in diplomacy; ${iEnd-iStart} != ${oEnd-oStart} means port resolution failed")
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for (i <- 0 until (iEnd - iStart)) {
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x.bundleIn(iStart+i) <> y.bundleOut(oStart+i)
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}
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}
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}
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}
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// !!! val (out, binding) = inner.connect(y.bundleOut(o), x.bundleIn(i), x.edgesIn(i))
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LazyModule.stack.head.bindings = connect _ :: LazyModule.stack.head.bindings
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None
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}
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override def := (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[LazyModule] = bind(h, BIND_ONCE)
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override def :*= (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[LazyModule] = bind(h, BIND_STAR)
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override def :=* (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[LazyModule] = bind(h, BIND_QUERY)
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// meta-data for printing the node graph
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protected[diplomacy] def colour = inner.colour
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protected[diplomacy] def outputs = oPorts.map(_._2) zip edgesOut.map(e => outer.labelO(e))
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protected[diplomacy] def inputs = iPorts.map(_._2) zip edgesIn .map(e => inner.labelI(e))
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}
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class SimpleNode[D, U, EO, EI, B <: Data](imp: NodeImp[D, U, EO, EI, B])(
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class SimpleNode[D, U, EO, EI, B <: Data](imp: NodeImp[D, U, EO, EI, B])(
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oFn: (Int, Seq[D]) => Seq[D],
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oFn: (Int, Seq[D]) => Seq[D],
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