coreplex: zero memory channels is also allowed
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@ -71,7 +71,7 @@ trait CoreplexNetworkModule extends HasCoreplexParameters {
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trait BankedL2CoherenceManagers extends CoreplexNetwork {
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val module: BankedL2CoherenceManagersModule
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require (isPow2(l2Config.nMemoryChannels))
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require (isPow2(l2Config.nMemoryChannels) || l2Config.nMemoryChannels == 0)
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require (isPow2(l2Config.nBanksPerChannel))
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require (isPow2(l1tol2_lineBytes))
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