riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

writebacks on release network pass asm tests and bmarks

Browse Source
This commit is contained in:
Henry Cook 2013-02-28 18:25:47 -08:00
parent a0dc8d52d6
commit cf76665d09
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/main/scala/RocketChip.scala
View File

@ -331,7 +331,7 @@ class TopIO(htif_width: Int) extends Bundle {
}
object DummyTopLevelConstants extends _root_.uncore.constants.CoherenceConfigConstants {
val NTILES = 1
val NTILES = 2
val HTIF_WIDTH = 16
val ENABLE_SHARING = true
val ENABLE_CLEAN_EXCLUSIVE = true