tilelink2: fix a bug in UIntToOH1 triggered if the size was too big
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@ -12,8 +12,7 @@ class TLEdge(
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{
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{
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def isAligned(address: UInt, lgSize: UInt) =
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def isAligned(address: UInt, lgSize: UInt) =
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if (maxLgSize == 0) Bool(true) else {
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if (maxLgSize == 0) Bool(true) else {
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val ones = UInt((1 << maxLgSize) - 1)
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val mask = ~(SInt(-1, width=maxLgSize).asUInt << lgSize)(maxLgSize-1, 0)
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val mask = (ones << lgSize)(maxLgSize*2-1, maxLgSize)
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(address & mask) === UInt(0)
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(address & mask) === UInt(0)
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}
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}
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@ -139,7 +139,7 @@ class TLFragmenter(minSize: Int, maxSize: Int, alwaysMin: Boolean = false) exten
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val maxDownSize = if (alwaysMin) minSize else manager.maxTransfer
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val maxDownSize = if (alwaysMin) minSize else manager.maxTransfer
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def OH1ToUInt(x: UInt) = OHToUInt((x << 1 | UInt(1)) ^ x)
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def OH1ToUInt(x: UInt) = OHToUInt((x << 1 | UInt(1)) ^ x)
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def UIntToOH1(x: UInt, width: Int) = (UInt((1 << width) - 1) << x)(width*2-1, width)
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def UIntToOH1(x: UInt, width: Int) = ~(SInt(-1, width=width).asUInt << x)(width-1, 0)
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// First, handle the return path
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// First, handle the return path
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val acknum = RegInit(UInt(0, width = counterBits))
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val acknum = RegInit(UInt(0, width = counterBits))
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@ -26,7 +26,7 @@ class TLNarrower(innerBeatBytes: Int) extends LazyModule
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val ratio = innerBeatBytes / outerBeatBytes
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val ratio = innerBeatBytes / outerBeatBytes
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val bce = edge.manager.anySupportAcquire && edge.client.anySupportProbe
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val bce = edge.manager.anySupportAcquire && edge.client.anySupportProbe
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def UIntToOH1(x: UInt, width: Int) = (UInt((1 << width) - 1) << x)(width*2-1, width)
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def UIntToOH1(x: UInt, width: Int) = ~(SInt(-1, width=width).asUInt << x)(width-1, 0)
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def trailingZeros(x: Int) = if (x > 0) Some(log2Ceil(x & -x)) else None
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def trailingZeros(x: Int) = if (x > 0) Some(log2Ceil(x & -x)) else None
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def split(in: HasTLData, fire: Bool): (Bool, UInt, UInt) = {
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def split(in: HasTLData, fire: Bool): (Bool, UInt, UInt) = {
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@ -96,7 +96,7 @@ class TLNarrower(innerBeatBytes: Int) extends LazyModule
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out.a.bits.mask := amask
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out.a.bits.mask := amask
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val (dlast, ddata) = merge(out.d.bits, out.d.fire())
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val (dlast, ddata) = merge(out.d.bits, out.d.fire())
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out.d.ready := in.d.ready
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out.d.ready := in.d.ready || !dlast
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in.d.valid := out.d.valid && dlast
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in.d.valid := out.d.valid && dlast
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in.d.bits := out.d.bits
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in.d.bits := out.d.bits
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in.d.bits.data := ddata
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in.d.bits.data := ddata
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