From c95c2ca9c83397e335c321c353ced2f9c300e584 Mon Sep 17 00:00:00 2001
From: "Wesley W. Terpstra" <wesley@sifive.com>
Date: Mon, 13 Mar 2017 16:24:57 -0700
Subject: [PATCH] AHB: include bridge unit tests

---
 src/main/scala/uncore/ahb/Test.scala  | 65 ++++++++++++++++++++++++++-
 src/main/scala/unittest/Configs.scala |  1 +
 2 files changed, 64 insertions(+), 2 deletions(-)

diff --git a/src/main/scala/uncore/ahb/Test.scala b/src/main/scala/uncore/ahb/Test.scala
index a139b4bb..6bcf94f7 100644
--- a/src/main/scala/uncore/ahb/Test.scala
+++ b/src/main/scala/uncore/ahb/Test.scala
@@ -16,10 +16,10 @@ class RRTest1(address: BigInt)(implicit p: Parameters) extends AHBRegisterRouter
   new AHBRegBundle((), _)    with RRTest1Bundle)(
   new AHBRegModule((), _, _) with RRTest1Module)
 
-class AHBFuzzBridge()(implicit p: Parameters) extends LazyModule
+class AHBFuzzNative()(implicit p: Parameters) extends LazyModule
 {
   val fuzz  = LazyModule(new TLFuzzer(5000))
-  val model = LazyModule(new TLRAMModel("AHBFuzzMaster"))
+  val model = LazyModule(new TLRAMModel("AHBFuzzNative"))
   var xbar  = LazyModule(new AHBFanout)
   val ram   = LazyModule(new AHBRAM(AddressSet(0x0, 0xff)))
   val gpio  = LazyModule(new RRTest0(0x100))
@@ -34,6 +34,67 @@ class AHBFuzzBridge()(implicit p: Parameters) extends LazyModule
   }
 }
 
+class AHBNativeTest()(implicit p: Parameters) extends UnitTest(500000) {
+  val dut = Module(LazyModule(new AHBFuzzNative).module)
+  io.finished := dut.io.finished
+}
+
+class AHBFuzzMaster()(implicit p: Parameters) extends LazyModule
+{
+  val node  = AHBOutputNode()
+  val fuzz  = LazyModule(new TLFuzzer(5000))
+  val model = LazyModule(new TLRAMModel("AHBFuzzMaster"))
+
+  model.node := fuzz.node
+  node :=
+    TLToAHB()(
+    TLDelayer(0.2)(
+    TLBuffer(TLBufferParams.flow)(
+    TLDelayer(0.2)(
+    model.node))))
+
+  lazy val module = new LazyModuleImp(this) {
+    val io = new Bundle {
+      val out = node.bundleOut
+      val finished = Bool(OUTPUT)
+    }
+
+    io.finished := fuzz.module.io.finished
+  }
+}
+
+class AHBFuzzSlave()(implicit p: Parameters) extends LazyModule
+{
+  val node = AHBInputNode()
+  val ram  = LazyModule(new TLTestRAM(AddressSet(0x0, 0xfff)))
+
+  ram.node :=
+    TLFragmenter(4, 16)(
+    TLDelayer(0.2)(
+    TLBuffer(TLBufferParams.flow)(
+    TLDelayer(0.2)(
+    AHBToTL()(
+    node)))))
+
+  lazy val module = new LazyModuleImp(this) {
+    val io = new Bundle {
+      val in = node.bundleIn
+    }
+  }
+}
+
+class AHBFuzzBridge()(implicit p: Parameters) extends LazyModule
+{
+  val master = LazyModule(new AHBFuzzMaster)
+  val slave  = LazyModule(new AHBFuzzSlave)
+
+  slave.node := master.node
+
+  lazy val module = new LazyModuleImp(this) with HasUnitTestIO {
+    io.finished := master.module.io.finished
+  }
+}
+
 class AHBBridgeTest()(implicit p: Parameters) extends UnitTest(500000) {
   val dut = Module(LazyModule(new AHBFuzzBridge).module)
   io.finished := dut.io.finished
diff --git a/src/main/scala/unittest/Configs.scala b/src/main/scala/unittest/Configs.scala
index a927eeda..5d6803d6 100644
--- a/src/main/scala/unittest/Configs.scala
+++ b/src/main/scala/unittest/Configs.scala
@@ -13,6 +13,7 @@ class WithUncoreUnitTests extends Config((site, here, up) => {
     Seq(
       Module(new uncore.tilelink2.TLFuzzRAMTest),
       Module(new uncore.ahb.AHBBridgeTest),
+      Module(new uncore.ahb.AHBNativeTest),
       Module(new uncore.apb.APBBridgeTest),
       Module(new uncore.axi4.AXI4LiteFuzzRAMTest),
       Module(new uncore.axi4.AXI4FullFuzzRAMTest),