riscv/rocket-chip
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Associative cache, boots kernel

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Henry Cook committed 2012-02-01 13:26:04 -08:00
1 parent 281abfbccb
commit c5a4eaa0a1
4 files changed
+58 -58
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rocket/src/main/scala/util.scala
+1 -2
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@@ -56,8 +56,7 @@ object UFixToOH
{
def apply(in: UFix, width: Int): Bits =
{
val out = Bits(1, width)
out << in
(UFix(1) << in(log2up(width)-1,0))
}
}