riscv/rocket-chip
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Associative cache, boots kernel

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Henry Cook
2012-02-01 13:26:04 -08:00
parent 281abfbccb
commit c5a4eaa0a1
4 changed files with 58 additions and 58 deletions
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2
rocket/src/main/scala/icache.scala
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@ -99,7 +99,7 @@ class rocketICache(sets: Int, assoc: Int) extends Component {
Mux((state === s_refill_wait) || (state === s_refill), Cat(r_cpu_req_idx(indexmsb,offsetbits), refill_count),
io.cpu.req_idx(indexmsb, offsetbits-rf_cnt_bits)).toUFix;
val data_mux = new Mux1H(assoc, MEM_DATA_BITS)
val data_mux = (new Mux1H(assoc)){Bits(width = MEM_DATA_BITS)}
var any_hit = Bool(false)
for (i <- 0 until assoc)
{