From c57639b23ff4f145b813ad51241daaf5797ddb57 Mon Sep 17 00:00:00 2001 From: Howard Mao Date: Sat, 5 Dec 2015 00:26:16 -0800 Subject: [PATCH] reverse order of RWX bits for compatibility --- junctions/src/main/scala/addrmap.scala | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/junctions/src/main/scala/addrmap.scala b/junctions/src/main/scala/addrmap.scala index e5c792a1..808ef5ee 100644 --- a/junctions/src/main/scala/addrmap.scala +++ b/junctions/src/main/scala/addrmap.scala @@ -40,18 +40,18 @@ case class MemSubmap(size: BigInt, entries: AddrMap) extends MemRegion case class MemChannels(size: BigInt, nchannels: Int, prot: Int) extends MemRegion object AddrMapConsts { - val R = 0x4 + val R = 0x1 val W = 0x2 - val X = 0x1 + val X = 0x4 val RW = R | W val RX = R | X val RWX = R | W | X } class AddrMapProt extends Bundle { - val r = Bool() - val w = Bool() val x = Bool() + val w = Bool() + val r = Bool() } case class AddrMapEntry(name: String, start: Option[BigInt], region: MemRegion)