From c4651206101d31ac73c834d7c3c635f66f4812b4 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Fri, 29 Jul 2016 15:19:09 -0700 Subject: [PATCH] [rocket] use more standard pattern for computing integer min --- rocket/src/main/scala/dma.scala | 2 +- rocket/src/main/scala/util.scala | 6 ------ 2 files changed, 1 insertion(+), 7 deletions(-) diff --git a/rocket/src/main/scala/dma.scala b/rocket/src/main/scala/dma.scala index ce1af0ed..e6e6f167 100644 --- a/rocket/src/main/scala/dma.scala +++ b/rocket/src/main/scala/dma.scala @@ -125,7 +125,7 @@ class DmaFrontend(implicit p: Parameters) extends CoreModule()(p) val last_src_vpn = Reg(UInt(width = vpnBits)) val last_dst_vpn = Reg(UInt(width = vpnBits)) - val tx_len = Util.minUInt(src_pglen, dst_pglen, bytes_left) + val tx_len = src_pglen min dst_pglen min bytes_left val dma_busy = Reg(init = UInt(0, tlMaxClientXacts)) val dma_xact_id = PriorityEncoder(~dma_busy) diff --git a/rocket/src/main/scala/util.scala b/rocket/src/main/scala/util.scala index 51c702f1..8ff520c6 100644 --- a/rocket/src/main/scala/util.scala +++ b/rocket/src/main/scala/util.scala @@ -44,12 +44,6 @@ object Util { def toBits(): UInt = Cat(x.map(_.toBits).reverse) } - def minUInt(values: Seq[UInt]): UInt = - values.reduce((a, b) => Mux(a < b, a, b)) - - def minUInt(first: UInt, rest: UInt*): UInt = - minUInt(first +: rest.toSeq) - implicit class UIntIsOneOf(val x: UInt) extends AnyVal { def isOneOf(s: Seq[UInt]): Bool = s.map(x === _).reduce(_||_)