Move PRCI from Coreplex to always-on block, where it belongs
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@ -276,6 +276,33 @@ trait PeripherySlaveModule extends HasPeripheryParameters {
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/////
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/** Always-ON block */
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trait PeripheryAON extends LazyModule {
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implicit val p: Parameters
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val pDevices: ResourceManager[AddrMapEntry]
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pDevices.add(AddrMapEntry("prci", MemSize(0x4000000, MemAttr(AddrMapProt.RW))))
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}
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trait PeripheryAONBundle {
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implicit val p: Parameters
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}
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trait PeripheryAONModule extends HasPeripheryParameters {
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implicit val p: Parameters
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val outer: PeripheryAON
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val io: PeripheryAONBundle
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val mmioNetwork: Option[TileLinkRecursiveInterconnect]
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val coreplex: Coreplex
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val prci = Module(new PRCI()(innerMMIOParams))
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prci.io.rtcTick := Counter(p(RTCPeriod)).inc()
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prci.io.tl <> mmioNetwork.get.port("prci")
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coreplex.io.prci <> prci.io.tiles
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}
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/////
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trait PeripheryTestRAM extends LazyModule {
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implicit val p: Parameters
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val pDevices: ResourceManager[AddrMapEntry]
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