From c036fff79c660e54c2f014557991f5ef72a5227a Mon Sep 17 00:00:00 2001 From: Yunsup Lee Date: Mon, 19 Mar 2012 15:13:57 -0700 Subject: [PATCH] fix id interrupt signal --- rocket/src/main/scala/ctrl.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rocket/src/main/scala/ctrl.scala b/rocket/src/main/scala/ctrl.scala index 398275c7..7f9a4e6f 100644 --- a/rocket/src/main/scala/ctrl.scala +++ b/rocket/src/main/scala/ctrl.scala @@ -458,7 +458,7 @@ class rocketCtrl extends Component val p_irq_timer = (io.dpath.status(15).toBool && io.dpath.irq_timer); val p_irq_ipi = (io.dpath.status(13).toBool && io.dpath.irq_ipi); val id_interrupt = - io.dpath.status(SR_ET).toBool && mem_reg_valid && + io.dpath.status(SR_ET).toBool && ((io.dpath.status(15).toBool && io.dpath.irq_timer) || (io.dpath.status(13).toBool && io.dpath.irq_ipi) || vec_irq);