From be9ddae77f9038cf9b582c418ae37100c692bc52 Mon Sep 17 00:00:00 2001 From: Henry Cook Date: Thu, 15 Sep 2016 13:04:01 -0700 Subject: [PATCH] make groundtest and unitest peers of rocketchip, with their own packages, harnesses and configs --- regression/Makefile | 4 +- src/main/scala/coreplex/Configs.scala | 9 +- src/main/scala/coreplex/Coreplex.scala | 4 - .../Configs.scala} | 124 ++++++++++++++++- src/main/scala/groundtest/Coreplex.scala | 9 ++ src/main/scala/groundtest/TestHarness.scala | 7 + src/main/scala/rocketchip/TestConfigs.scala | 127 ------------------ .../UnitTest.scala => unittest/Configs.scala} | 4 +- src/main/scala/util/ConfigUtils.scala | 11 ++ 9 files changed, 151 insertions(+), 148 deletions(-) rename src/main/scala/{coreplex/TestConfigs.scala => groundtest/Configs.scala} (55%) create mode 100644 src/main/scala/groundtest/Coreplex.scala create mode 100644 src/main/scala/groundtest/TestHarness.scala delete mode 100644 src/main/scala/rocketchip/TestConfigs.scala rename src/main/scala/{rocketchip/UnitTest.scala => unittest/Configs.scala} (93%) create mode 100644 src/main/scala/util/ConfigUtils.scala diff --git a/regression/Makefile b/regression/Makefile index ca210738..95a23319 100644 --- a/regression/Makefile +++ b/regression/Makefile @@ -44,14 +44,14 @@ CONFIGS=DefaultConfig DefaultL2Config DefaultBufferlessConfig TinyConfig endif ifeq ($(SUITE),GroundtestSuite) -PROJECT=rocketchip +PROJECT=groundtest CONFIGS=MemtestConfig MemtestBufferlessConfig MemtestStatelessConfig FancyMemtestConfig \ BroadcastRegressionTestConfig BufferlessRegressionTestConfig CacheRegressionTestConfig \ ComparatorConfig ComparatorBufferlessConfig ComparatorL2Config ComparatorStatelessConfig endif ifeq ($(SUITE),UnittestSuite) -PROJECT=rocketchip.utest +PROJECT=unittest CONFIGS=UnitTestConfig endif diff --git a/src/main/scala/coreplex/Configs.scala b/src/main/scala/coreplex/Configs.scala index 8d8d87ad..14604529 100644 --- a/src/main/scala/coreplex/Configs.scala +++ b/src/main/scala/coreplex/Configs.scala @@ -11,19 +11,12 @@ import uncore.devices._ import uncore.converters._ import rocket._ import rocket.Util._ +import util.ConfigUtils._ import rocketchip.{GlobalAddrMap, NCoreplexExtClients} -import scala.math.max import scala.collection.mutable.{LinkedHashSet, ListBuffer} import DefaultTestSuites._ import cde.{Parameters, Config, Dump, Knob, CDEMatchError} -object ConfigUtils { - def max_int(values: Int*): Int = { - values.reduce((a, b) => max(a, b)) - } -} -import ConfigUtils._ - class BaseCoreplexConfig extends Config ( topDefinitions = { (pname,site,here) => type PF = PartialFunction[Any,Any] diff --git a/src/main/scala/coreplex/Coreplex.scala b/src/main/scala/coreplex/Coreplex.scala index 619f6410..1c6ef1b9 100644 --- a/src/main/scala/coreplex/Coreplex.scala +++ b/src/main/scala/coreplex/Coreplex.scala @@ -164,7 +164,3 @@ class DefaultCoreplex(tp: Parameters, tc: CoreplexConfig) extends Coreplex()(tp, io.master.mmio.foreach { _ <> mmioNetwork.port("ext") } } } - -class GroundTestCoreplex(tp: Parameters, tc: CoreplexConfig) extends DefaultCoreplex(tp, tc) { - io.success := tileList.flatMap(_.io.elements get "success").map(_.asInstanceOf[Bool]).reduce(_&&_) -} diff --git a/src/main/scala/coreplex/TestConfigs.scala b/src/main/scala/groundtest/Configs.scala similarity index 55% rename from src/main/scala/coreplex/TestConfigs.scala rename to src/main/scala/groundtest/Configs.scala index b2e7e05c..d7db98f2 100644 --- a/src/main/scala/coreplex/TestConfigs.scala +++ b/src/main/scala/groundtest/Configs.scala @@ -1,19 +1,133 @@ -package coreplex +package groundtest import Chisel._ -import groundtest._ -import rocketchip.{GlobalAddrMap} import rocket._ import uncore.tilelink._ import uncore.coherence._ import uncore.agents._ import uncore.devices.NTiles -import unittest._ import junctions._ import scala.collection.mutable.LinkedHashSet +import scala.collection.immutable.HashMap import cde.{Parameters, Config, Dump, Knob, CDEMatchError} import scala.math.max -import ConfigUtils._ +import coreplex._ +import rocketchip._ +import util.ConfigUtils._ + +/** Actual testing target Configs */ + +class GroundTestConfig extends Config(new WithGroundTest ++ new BaseConfig) + +class ComparatorConfig extends Config( + new WithComparator ++ new GroundTestConfig) +class ComparatorL2Config extends Config( + new WithAtomics ++ new WithPrefetches ++ + new WithL2Cache ++ new ComparatorConfig) +class ComparatorBufferlessConfig extends Config( + new WithBufferlessBroadcastHub ++ new ComparatorConfig) +class ComparatorStatelessConfig extends Config( + new WithStatelessBridge ++ new ComparatorConfig) + +class MemtestConfig extends Config(new WithMemtest ++ new GroundTestConfig) +class MemtestL2Config extends Config( + new WithL2Cache ++ new MemtestConfig) +class MemtestBufferlessConfig extends Config( + new WithBufferlessBroadcastHub ++ new MemtestConfig) +class MemtestStatelessConfig extends Config( + new WithNGenerators(0, 1) ++ new WithStatelessBridge ++ new MemtestConfig) +// Test ALL the things +class FancyMemtestConfig extends Config( + new WithNGenerators(1, 2) ++ new WithNCores(2) ++ new WithMemtest ++ + new WithNMemoryChannels(2) ++ new WithNBanksPerMemChannel(4) ++ + new WithSplitL2Metadata ++ new WithL2Cache ++ new GroundTestConfig) + +class CacheFillTestConfig extends Config( + new WithCacheFillTest ++ new WithPLRU ++ new WithL2Cache ++ new GroundTestConfig) + +class BroadcastRegressionTestConfig extends Config( + new WithBroadcastRegressionTest ++ new GroundTestConfig) +class BufferlessRegressionTestConfig extends Config( + new WithBufferlessBroadcastHub ++ new BroadcastRegressionTestConfig) +class CacheRegressionTestConfig extends Config( + new WithCacheRegressionTest ++ new WithL2Cache ++ new GroundTestConfig) + +class NastiConverterTestConfig extends Config(new WithNastiConverterTest ++ new GroundTestConfig) +class FancyNastiConverterTestConfig extends Config( + new WithNCores(2) ++ new WithNastiConverterTest ++ + new WithNMemoryChannels(2) ++ new WithNBanksPerMemChannel(4) ++ + new WithL2Cache ++ new GroundTestConfig) + +class TraceGenConfig extends Config( + new WithNCores(2) ++ new WithTraceGen ++ new GroundTestConfig) +class TraceGenBufferlessConfig extends Config( + new WithBufferlessBroadcastHub ++ new TraceGenConfig) +class TraceGenL2Config extends Config( + new WithNL2Ways(1) ++ new WithL2Capacity(32 * 64 / 1024) ++ + new WithL2Cache ++ new TraceGenConfig) + +class MIF128BitComparatorConfig extends Config( + new WithMIFDataBits(128) ++ new ComparatorConfig) +class MIF128BitMemtestConfig extends Config( + new WithMIFDataBits(128) ++ new MemtestConfig) + +class MIF32BitComparatorConfig extends Config( + new WithMIFDataBits(32) ++ new ComparatorConfig) +class MIF32BitMemtestConfig extends Config( + new WithMIFDataBits(32) ++ new MemtestConfig) + +class PCIeMockupTestConfig extends Config( + new WithPCIeMockupTest ++ new GroundTestConfig) + +/* Composable Configs to set individual parameters */ +class WithGroundTest extends Config( + (pname, site, here) => pname match { + case BuildCoreplex => + (p: Parameters, c: CoreplexConfig) => Module(new GroundTestCoreplex(p, c)) + case TLKey("L1toL2") => { + val useMEI = site(NTiles) <= 1 && site(NCachedTileLinkPorts) <= 1 + TileLinkParameters( + coherencePolicy = ( + if (useMEI) new MEICoherence(site(L2DirectoryRepresentation)) + else new MESICoherence(site(L2DirectoryRepresentation))), + nManagers = site(NBanksPerMemoryChannel)*site(NMemoryChannels) + 1, + nCachingClients = site(NCachedTileLinkPorts), + nCachelessClients = site(NCoreplexExtClients).get + site(NUncachedTileLinkPorts), + maxClientXacts = ((site(DCacheKey).nMSHRs + 1) +: + site(GroundTestKey).map(_.maxXacts)) + .reduce(max(_, _)), + maxClientsPerPort = 1, + maxManagerXacts = site(NAcquireTransactors) + 2, + dataBeats = 8, + dataBits = site(CacheBlockBytes)*8) + } + case BuildTiles => { + val groundtest = if (site(XLen) == 64) + DefaultTestSuites.groundtest64 + else + DefaultTestSuites.groundtest32 + TestGeneration.addSuite(groundtest("p")) + TestGeneration.addSuite(DefaultTestSuites.emptyBmarks) + (0 until site(NTiles)).map { i => + val tileSettings = site(GroundTestKey)(i) + (r: Bool, p: Parameters) => { + Module(new GroundTestTile(resetSignal = r)(p.alterPartial({ + case TLId => "L1toL2" + case TileId => i + case NCachedTileLinkPorts => if(tileSettings.cached > 0) 1 else 0 + case NUncachedTileLinkPorts => tileSettings.uncached + }))) + } + } + } + case BuildExampleTop => + (p: Parameters) => uncore.tilelink2.LazyModule(new ExampleTopWithTestRAM(p)) + case FPUKey => None + case UseAtomics => false + case UseCompressed => false + case RegressionTestNames => LinkedHashSet("rv64ui-p-simple") + case _ => throw new CDEMatchError + }) class WithComparator extends Config( (pname, site, here) => pname match { diff --git a/src/main/scala/groundtest/Coreplex.scala b/src/main/scala/groundtest/Coreplex.scala new file mode 100644 index 00000000..2d93ee42 --- /dev/null +++ b/src/main/scala/groundtest/Coreplex.scala @@ -0,0 +1,9 @@ +package groundtest + +import Chisel._ +import cde.{Parameters} +import coreplex.{CoreplexConfig, DefaultCoreplex} + +class GroundTestCoreplex(tp: Parameters, tc: CoreplexConfig) extends DefaultCoreplex(tp, tc) { + io.success := tileList.flatMap(_.io.elements get "success").map(_.asInstanceOf[Bool]).reduce(_&&_) +} diff --git a/src/main/scala/groundtest/TestHarness.scala b/src/main/scala/groundtest/TestHarness.scala new file mode 100644 index 00000000..8853c513 --- /dev/null +++ b/src/main/scala/groundtest/TestHarness.scala @@ -0,0 +1,7 @@ +package groundtest + +import Chisel._ +import cde.Parameters + +// !!! TODO: Replace with a groundtest-specific test harness +class TestHarness(implicit p: Parameters) extends rocketchip.TestHarness()(p) diff --git a/src/main/scala/rocketchip/TestConfigs.scala b/src/main/scala/rocketchip/TestConfigs.scala deleted file mode 100644 index 96127f16..00000000 --- a/src/main/scala/rocketchip/TestConfigs.scala +++ /dev/null @@ -1,127 +0,0 @@ -package rocketchip - -import Chisel._ -import groundtest._ -import rocket._ -import uncore.tilelink._ -import uncore.coherence._ -import uncore.agents._ -import uncore.devices.NTiles -import junctions._ -import scala.collection.mutable.LinkedHashSet -import scala.collection.immutable.HashMap -import cde.{Parameters, Config, Dump, Knob, CDEMatchError} -import scala.math.max -import coreplex._ -import ConfigUtils._ - -class WithGroundTest extends Config( - (pname, site, here) => pname match { - case BuildCoreplex => - (p: Parameters, c: CoreplexConfig) => Module(new GroundTestCoreplex(p, c)) - case TLKey("L1toL2") => { - val useMEI = site(NTiles) <= 1 && site(NCachedTileLinkPorts) <= 1 - TileLinkParameters( - coherencePolicy = ( - if (useMEI) new MEICoherence(site(L2DirectoryRepresentation)) - else new MESICoherence(site(L2DirectoryRepresentation))), - nManagers = site(NBanksPerMemoryChannel)*site(NMemoryChannels) + 1, - nCachingClients = site(NCachedTileLinkPorts), - nCachelessClients = site(NCoreplexExtClients).get + site(NUncachedTileLinkPorts), - maxClientXacts = ((site(DCacheKey).nMSHRs + 1) +: - site(GroundTestKey).map(_.maxXacts)) - .reduce(max(_, _)), - maxClientsPerPort = 1, - maxManagerXacts = site(NAcquireTransactors) + 2, - dataBeats = 8, - dataBits = site(CacheBlockBytes)*8) - } - case BuildTiles => { - val groundtest = if (site(XLen) == 64) - DefaultTestSuites.groundtest64 - else - DefaultTestSuites.groundtest32 - TestGeneration.addSuite(groundtest("p")) - TestGeneration.addSuite(DefaultTestSuites.emptyBmarks) - (0 until site(NTiles)).map { i => - val tileSettings = site(GroundTestKey)(i) - (r: Bool, p: Parameters) => { - Module(new GroundTestTile(resetSignal = r)(p.alterPartial({ - case TLId => "L1toL2" - case TileId => i - case NCachedTileLinkPorts => if(tileSettings.cached > 0) 1 else 0 - case NUncachedTileLinkPorts => tileSettings.uncached - }))) - } - } - } - case BuildExampleTop => - (p: Parameters) => uncore.tilelink2.LazyModule(new ExampleTopWithTestRAM(p)) - case FPUKey => None - case UseAtomics => false - case UseCompressed => false - case RegressionTestNames => LinkedHashSet("rv64ui-p-simple") - case _ => throw new CDEMatchError - }) - -class GroundTestConfig extends Config(new WithGroundTest ++ new BaseConfig) - -class ComparatorConfig extends Config( - new WithComparator ++ new GroundTestConfig) -class ComparatorL2Config extends Config( - new WithAtomics ++ new WithPrefetches ++ - new WithL2Cache ++ new ComparatorConfig) -class ComparatorBufferlessConfig extends Config( - new WithBufferlessBroadcastHub ++ new ComparatorConfig) -class ComparatorStatelessConfig extends Config( - new WithStatelessBridge ++ new ComparatorConfig) - -class MemtestConfig extends Config(new WithMemtest ++ new GroundTestConfig) -class MemtestL2Config extends Config( - new WithL2Cache ++ new MemtestConfig) -class MemtestBufferlessConfig extends Config( - new WithBufferlessBroadcastHub ++ new MemtestConfig) -class MemtestStatelessConfig extends Config( - new WithNGenerators(0, 1) ++ new WithStatelessBridge ++ new MemtestConfig) -// Test ALL the things -class FancyMemtestConfig extends Config( - new WithNGenerators(1, 2) ++ new WithNCores(2) ++ new WithMemtest ++ - new WithNMemoryChannels(2) ++ new WithNBanksPerMemChannel(4) ++ - new WithSplitL2Metadata ++ new WithL2Cache ++ new GroundTestConfig) - -class CacheFillTestConfig extends Config( - new WithCacheFillTest ++ new WithPLRU ++ new WithL2Cache ++ new GroundTestConfig) - -class BroadcastRegressionTestConfig extends Config( - new WithBroadcastRegressionTest ++ new GroundTestConfig) -class BufferlessRegressionTestConfig extends Config( - new WithBufferlessBroadcastHub ++ new BroadcastRegressionTestConfig) -class CacheRegressionTestConfig extends Config( - new WithCacheRegressionTest ++ new WithL2Cache ++ new GroundTestConfig) - -class NastiConverterTestConfig extends Config(new WithNastiConverterTest ++ new GroundTestConfig) -class FancyNastiConverterTestConfig extends Config( - new WithNCores(2) ++ new WithNastiConverterTest ++ - new WithNMemoryChannels(2) ++ new WithNBanksPerMemChannel(4) ++ - new WithL2Cache ++ new GroundTestConfig) - -class TraceGenConfig extends Config( - new WithNCores(2) ++ new WithTraceGen ++ new GroundTestConfig) -class TraceGenBufferlessConfig extends Config( - new WithBufferlessBroadcastHub ++ new TraceGenConfig) -class TraceGenL2Config extends Config( - new WithNL2Ways(1) ++ new WithL2Capacity(32 * 64 / 1024) ++ - new WithL2Cache ++ new TraceGenConfig) - -class MIF128BitComparatorConfig extends Config( - new WithMIFDataBits(128) ++ new ComparatorConfig) -class MIF128BitMemtestConfig extends Config( - new WithMIFDataBits(128) ++ new MemtestConfig) - -class MIF32BitComparatorConfig extends Config( - new WithMIFDataBits(32) ++ new ComparatorConfig) -class MIF32BitMemtestConfig extends Config( - new WithMIFDataBits(32) ++ new MemtestConfig) - -class PCIeMockupTestConfig extends Config( - new WithPCIeMockupTest ++ new GroundTestConfig) diff --git a/src/main/scala/rocketchip/UnitTest.scala b/src/main/scala/unittest/Configs.scala similarity index 93% rename from src/main/scala/rocketchip/UnitTest.scala rename to src/main/scala/unittest/Configs.scala index d310caac..5a891c6a 100644 --- a/src/main/scala/rocketchip/UnitTest.scala +++ b/src/main/scala/unittest/Configs.scala @@ -1,11 +1,11 @@ // See LICENSE for license details. -package rocketchip.utest +package unittest import scala.collection.mutable.LinkedHashSet import Chisel._ -import cde.{Parameters, Config, Dump, Knob, CDEMatchError} +import cde.{Parameters, Config, Knob, CDEMatchError} import util.{ParameterizedBundle} import rocket._ import uncore.tilelink._ diff --git a/src/main/scala/util/ConfigUtils.scala b/src/main/scala/util/ConfigUtils.scala new file mode 100644 index 00000000..4e5cd8f0 --- /dev/null +++ b/src/main/scala/util/ConfigUtils.scala @@ -0,0 +1,11 @@ +// See LICENSE for license details. + +package util + +import scala.math.max + +object ConfigUtils { + def max_int(values: Int*): Int = { + values.reduce((a, b) => max(a, b)) + } +}