From b74a419bfbb34f4ec2e56373386f701c31939245 Mon Sep 17 00:00:00 2001 From: "Wesley W. Terpstra" Date: Tue, 5 Sep 2017 16:27:57 -0700 Subject: [PATCH] FrontBus: FIFOFixer should not have a buffer between it and Xbar --- src/main/scala/coreplex/FrontBus.scala | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/src/main/scala/coreplex/FrontBus.scala b/src/main/scala/coreplex/FrontBus.scala index 6e4b3883..e51732a0 100644 --- a/src/main/scala/coreplex/FrontBus.scala +++ b/src/main/scala/coreplex/FrontBus.scala @@ -19,25 +19,24 @@ case object FrontBusParams extends Field[FrontBusParams] class FrontBus(params: FrontBusParams)(implicit p: Parameters) extends TLBusWrapper(params, "FrontBus") { + private val master_buffer = LazyModule(new TLBuffer(params.masterBuffering)) private val master_fixer = LazyModule(new TLFIFOFixer(TLFIFOFixer.all)) - master_fixer.suggestName(s"${busName}_master_TLFIFOFixer") - inwardBufNode :=* master_fixer.node - def fromSyncMasters(addBuffers: Int = 0, name: Option[String] = None): TLInwardNode = { - val (in, out) = bufferChain(addBuffers, name) - inwardBufNode :=* out - in - } + master_buffer.suggestName(s"${busName}_master_TLBuffer") + master_fixer.suggestName(s"${busName}_master_TLFIFOFixer") + + master_fixer.node :=* master_buffer.node + inwardNode :=* master_fixer.node def fromSyncPorts(addBuffers: Int = 0, name: Option[String] = None): TLInwardNode = { val (in, out) = bufferChain(addBuffers, name) - master_fixer.node :=* out + master_buffer.node :=* out in } - def fromSyncFIFOMasters(addBuffers: Int = 0, name: Option[String] = None): TLInwardNode = { + def fromSyncMasters(addBuffers: Int = 0, name: Option[String] = None): TLInwardNode = { val (in, out) = bufferChain(addBuffers, name) - master_fixer.node :=* out + master_buffer.node :=* out in }