riscv/rocket-chip
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Reg standardization

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This commit is contained in:
Henry Cook
2013-08-13 17:50:02 -07:00
parent 858169917e
commit b570435847
6 changed files with 45 additions and 58 deletions
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rocket/src/main/scala/ctrl.scala
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@@ -407,7 +407,7 @@ class Control(implicit conf: RocketConfiguration) extends Module
val wb_reg_div_mul_val = RegReset(Bool(false))
val take_pc = Bool()
val pc_taken = Reg(update = take_pc, reset = Bool(false))
val pc_taken = RegUpdate(take_pc, Bool(false))
val take_pc_wb = Bool()
val ctrl_killd = Bool()
val ctrl_killx = Bool()