riscv/rocket-chip
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Simplify branch offset mux

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This commit is contained in:
Andrew Waterman 2013-10-29 04:13:50 -07:00
parent 23f7bab4f3
commit b44dafbdca
1 changed files with 1 additions and 1 deletions
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rocket/src/main/scala/dpath.scala
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@ -184,7 +184,7 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
e(0))) e(0)))
} }
val ex_br_base = Mux(io.ctrl.ex_jalr, ex_rs1, ex_reg_pc) val ex_br_base = Mux(io.ctrl.ex_jalr, ex_rs1, ex_reg_pc)
val ex_br_offset = Mux(io.ctrl.ex_predicted_taken && !io.ctrl.ex_jalr, SInt(4), ex_imm) val ex_br_offset = Mux(io.ctrl.ex_predicted_taken && !io.ctrl.ex_jalr, SInt(4), ex_imm(19,0).toSInt)
val ex_br64 = ex_br_base + ex_br_offset val ex_br64 = ex_br_base + ex_br_offset
val ex_br_msb = Mux(io.ctrl.ex_jalr, vaSign(ex_rs1, ex_br64), vaSign(ex_reg_pc, ex_br64)) val ex_br_msb = Mux(io.ctrl.ex_jalr, vaSign(ex_rs1, ex_br64), vaSign(ex_reg_pc, ex_br64))
val ex_br_addr = Cat(ex_br_msb, ex_br64(VADDR_BITS-1,0)) val ex_br_addr = Cat(ex_br_msb, ex_br64(VADDR_BITS-1,0))