riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

add firrtl to regression makefile

Browse Source 
this makes it easier to test chisel3 builds
e.g. the local buildbot can now test a bunch of configs
This commit is contained in:
Colin Schmidt 2016-05-17 17:34:20 -07:00
parent 684d902059
commit b0ae003981
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
regression/Makefile
View File

@ -70,7 +70,7 @@ fsim-asm-tests: stamps/$(CONFIG)/fsim-asm-tests.stamp
fsim-bmark-tests: stamps/$(CONFIG)/fsim-bmark-tests.stamp fsim-bmark-tests: stamps/$(CONFIG)/fsim-bmark-tests.stamp
fsim-torture: stamps/$(CONFIG)/fsim-torture-$(TORTURE_CONFIG).stamp fsim-torture: stamps/$(CONFIG)/fsim-torture-$(TORTURE_CONFIG).stamp
submodule_names = chisel2 chisel3 context-dependent-environments dramsim2 groundtest hardfloat junctions rocket torture uncore zscale $(ROCKETCHIP_ADDONS) submodule_names = chisel2 chisel3 context-dependent-environments dramsim2 firrtl groundtest hardfloat junctions rocket torture uncore zscale $(ROCKETCHIP_ADDONS)
# Checks out all the rocket-chip submodules # Checks out all the rocket-chip submodules
stamps/other-submodules.stamp: stamps/other-submodules.stamp: