riscv/rocket-chip
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Adjustements to top-level parameters and knobs for hwacha

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This commit is contained in:
Henry Cook 2014-09-07 17:57:33 -07:00
parent 4126678c9d
commit ae05125f29
2 changed files with 2 additions and 2 deletions
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2
rocket

@ -1 +1 @@
Subproject commit 15e0d48a614db7b44eebb830175f759a0eb0eaf1
Subproject commit b53ad86d4397dd29a038dfdd9ca5d7b97eff0525

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src/main/scala/PublicConfigs.scala
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@ -75,7 +75,7 @@ class DefaultConfig extends ChiselConfig {
case FastMulDiv => true
case XprLen => 64
case NMultXpr => 32
case BuildFPU => Some(() => new FPU)
case BuildFPU => Some(() => Module(new FPU))
case SFMALatency => 2
case DFMALatency => 3
case CoreInstBits => 32