add TL manager for MMIO requests

2016-01-14 22:01:42 -08:00
parent c1fe188c81
commit adaec18bec
2 changed files with 69 additions and 0 deletions
--- a/uncore/src/main/scala/uncore.scala
+++ b/uncore/src/main/scala/uncore.scala
@ -32,6 +32,7 @@ trait HasCoherenceAgentParameters {
  val innerWriteMaskBits = innerTLParams.writeMaskBits
  val innerBeatAddrBits = log2Up(innerDataBeats)
  val innerByteAddrBits = log2Up(innerDataBits/8)
+  val maxManagerXacts = innerTLParams.maxManagerXacts
  require(outerDataBeats == innerDataBeats) //TODO: fix all xact_data Vecs to remove this requirement
 }