From ac4b3f9f224a68596a122ed88ddf96954ba0c3b6 Mon Sep 17 00:00:00 2001 From: Yunsup Lee Date: Tue, 4 Mar 2014 23:38:49 -0800 Subject: [PATCH] print out core id --- rocket/src/main/scala/dpath.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rocket/src/main/scala/dpath.scala b/rocket/src/main/scala/dpath.scala index afbe1ddc..0a958236 100644 --- a/rocket/src/main/scala/dpath.scala +++ b/rocket/src/main/scala/dpath.scala @@ -300,8 +300,8 @@ class Datapath(implicit conf: RocketConfiguration) extends Module io.ctrl.mem_waddr := mem_reg_inst(11,7) io.ctrl.wb_waddr := wb_reg_inst(11,7) - printf("C: %d [%d] pc=[%x] W[r%d=%x][%d] R[r%d=%x] R[r%d=%x] inst=[%x] DASM(%x)\n", - pcr.io.time(32,0), io.ctrl.retire, wb_reg_pc, + printf("C%d: %d [%d] pc=[%x] W[r%d=%x][%d] R[r%d=%x] R[r%d=%x] inst=[%x] DASM(%x)\n", + io.host.id, pcr.io.time(32,0), io.ctrl.retire, wb_reg_pc, Mux(wb_wen, wb_waddr, UInt(0)), wb_wdata, wb_wen, wb_reg_inst(19,15), Reg(next=Reg(next=ex_rs(0))), wb_reg_inst(24,20), Reg(next=Reg(next=ex_rs(1))),