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tilelink2: save some hardware in HintHandler if no BCE

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This commit is contained in:
Wesley W. Terpstra 2016-08-31 17:44:48 -07:00
parent 18e7d4cd65
commit ab998c08f1
1 changed files with 11 additions and 5 deletions
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16
uncore/src/main/scala/tilelink2/HintHandler.scala
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@ -22,6 +22,10 @@ class TLHintHandler(supportManagers: Boolean = true, supportClients: Boolean = f
val edgeIn = node.edgesIn(0) val edgeIn = node.edgesIn(0)
val edgeOut = node.edgesOut(0) val edgeOut = node.edgesOut(0)
// Don't add support for clients if there is no BCE channel
val bce = edgeOut.manager.anySupportAcquire && edgeIn.client.anySupportProbe
require (!supportClients || bce)
if (supportManagers) { if (supportManagers) {
val handleA = if (passthrough) !edgeOut.manager.supportsHint(in.a.bits.address) else Bool(true) val handleA = if (passthrough) !edgeOut.manager.supportsHint(in.a.bits.address) else Bool(true)
val bypassD = handleA && in.a.bits.opcode === TLMessages.Hint val bypassD = handleA && in.a.bits.opcode === TLMessages.Hint
@ -56,7 +60,7 @@ class TLHintHandler(supportManagers: Boolean = true, supportClients: Boolean = f
out.b.ready := Mux(bypassC, out.c.ready && !in.c.valid, in.b.ready) out.b.ready := Mux(bypassC, out.c.ready && !in.c.valid, in.b.ready)
in.b.valid := out.b.valid && !bypassC in.b.valid := out.b.valid && !bypassC
in.b.bits := out.b.bits in.b.bits := out.b.bits
} else { } else if (bce) {
in.b.valid := out.b.valid in.b.valid := out.b.valid
out.b.ready := in.b.ready out.b.ready := in.b.ready
in.b.bits := out.b.bits in.b.bits := out.b.bits
@ -66,10 +70,12 @@ class TLHintHandler(supportManagers: Boolean = true, supportClients: Boolean = f
out.c.bits := in.c.bits out.c.bits := in.c.bits
} }
// Pass E through unchanged if (bce) {
out.e.valid := in.e.valid // Pass E through unchanged
in.e.ready := out.e.ready out.e.valid := in.e.valid
out.e.bits := in.e.bits in.e.ready := out.e.ready
out.e.bits := in.e.bits
}
}) })
} }