riscv/rocket-chip
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don't share fma pipes

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This commit is contained in:
Yunsup Lee
2014-02-05 14:21:43 -08:00
parent 6a02d15c21
commit ab4a3e937b
2 changed files with 2 additions and 6 deletions
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6
rocket/src/main/scala/core.scala
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@@ -42,8 +42,6 @@ class Core(implicit conf: RocketConfiguration) extends Module
ctrl.io.rocc <> io.rocc ctrl.io.rocc <> io.rocc
dpath.io.rocc <> io.rocc dpath.io.rocc <> io.rocc
require(conf.fpu) fpu.io.sfma.valid := Bool(false)
// Hookup the {S,D}FMA pipes fpu.io.dfma.valid := Bool(false)
fpu.io.sfma <> io.rocc.cp_sfma
fpu.io.dfma <> io.rocc.cp_dfma
} }

2
rocket/src/main/scala/rocc.scala
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@@ -46,8 +46,6 @@ class RoCCInterface(implicit conf: RocketConfiguration) extends Bundle
val iptw = new TLBPTWIO val iptw = new TLBPTWIO
val dptw = new TLBPTWIO val dptw = new TLBPTWIO
val pptw = new TLBPTWIO val pptw = new TLBPTWIO
val cp_dfma = new ioFMA(65).flip
val cp_sfma = new ioFMA(33).flip
val exception = Bool(INPUT) val exception = Bool(INPUT)
override def clone = new RoCCInterface().asInstanceOf[this.type] override def clone = new RoCCInterface().asInstanceOf[this.type]